HD6432670 Hitachi, HD6432670 Datasheet - Page 918
HD6432670
Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432670.pdf
(953 pages)
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Timing of On-Chip Peripheral Modules
Table 24.10 Timing of On-Chip Peripheral Modules
Conditions: V
Item
I/O ports
PPG
TPU
8-bit timer Timer output delay time
WDT
SCI
A/D
converter
Rev. 2.0, 04/02, page 872 of 906
Output data delay time
Input data setup time
Input data hold time
Pulse output delay time
Timer output delay time
Timer input setup time
Timer clock input setup time
Timer clock
pulse width
Timer reset input setup time
Timer clock input setup time
Timer clock
pulse width
Overflow output delay time
Input clock
cycle
Input clock pulse width
Input clock rise time
Input clock fall time
Transmit data delay time
Receive data setup time
(synchronous)
Receive data hold time
(synchronous)
Trigger input setup time
ø = 8 MHz to 33 MHz, T
T
a
CC
= –40°C to +85°C (wide-range specifications)
= 3.0 V to 3.6 V, AV
Single-edge
specification
Both-edge
specification
Single-edge
specification
Both-edge
specification
Asynchronous
Synchronous
a
CC
= –20°C to +75°C (regular specifications),
= 3.0 V to 3.6 V, V
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PWD
PRS
PRH
POD
TOCD
TICS
TCKS
TCKWH
TCKWL
TMOD
TMRS
TMCS
TMCWH
TMCWL
WOVD
Scyc
SCKW
SCKr
SCKf
TXD
RXS
RXH
TRGS
Min
—
25
25
—
—
25
25
1.5
2.5
—
25
25
1.5
2.5
—
4
6
0.4
—
—
—
40
40
30
ref
= 3.0 V to AV
Max
40
—
—
40
40
—
—
—
—
40
—
—
—
—
40
—
—
0.6
1.5
1.5
40
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
t
t
ns
ns
ns
t
t
ns
t
t
t
ns
ns
ns
ns
cyc
cyc
cyc
cyc
cyc
Scyc
cyc
CC
, V
Test Conditions
Figure 24.34
Figure 24.35
Figure 24.36
Figure 24.37
Figure 24.38
Figure 24.40
Figure 24.39
Figure 24.41
Figure 24.42
Figure 24.43
Figure 24.44
SS
= AV
SS
= 0 V,
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