HD6432670 Hitachi, HD6432670 Datasheet - Page 744
HD6432670
Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432670.pdf
(953 pages)
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15.8
When the IrDA function is enabled with bit IrE in IrCR, the SCI_0 TxD0 and RxD0 signals are
subjected to waveform encoding/decoding conforming to IrDA specification version 1.0 (IrTxD
and IrRxD pins). By connecting these pins to an infrared transceiver/receiver, it is possible to
implement infrared transmission/reception conforming to the IrDA specification version 1.0
system.
In the IrDA specification version 1.0 system, communication is started at a transfer rate of 9600
bps, and subsequently the transfer rate can be varied as necessary. As the IrDA interface in this
LSI does not include a function for varying the transfer rate automatically, the transfer rate setting
must be changed by software.
Figure 15.33 shows a block diagram of the IrDA function.
Transmission: In transmission, the output signal (UART frame) from the SCI is converted to an
IR frame by the IrDA interface (see figure 15.34).
When the serial data is 0, a high pulse of 3/16 the bit rate (interval equivalent to the width of one
bit) is output (initial value). The high-level pulse can be varied according to the setting of bits
IrCKS2 to IrCKS0 in IrCR.
In the specification, the high pulse width is fixed at a minimum of 1.41 µs, and a maximum of
(3/16 + 2.5%) bit rate or (3/16 bit rate) + 1.08 µs. When system clock ø is 20 MHz, 1.6 µs can
be set for a high pulse width with a minimum value of 1.41 µs.
Rev. 2.0, 04/02, page 698 of 906
IrDA Operation
TxD0/IrTxD
RxD0/IrRxD
Figure 15.33 Block Diagram of IrDA
Pulse encoder
Pulse decoder
IrCR
IrDA
RxD
TxD
SCI0
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