HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 87

no-image

HD6417034B

Manufacturer Part Number
HD6417034B
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417034BVFN20
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD6417034BVFN20
Manufacturer:
RENESAS
Quantity:
482
Part Number:
HD6417034BVFW20
Manufacturer:
MITSUBISHI
Quantity:
101
Part Number:
HD6417034BVXN20
Manufacturer:
Renesas Electronics America
Quantity:
10 000
4.5
4.5.1
Table 4.8 shows the three types of instruction that start exception handling (trap instructions,
illegal slot instructions, and general illegal instructions).
Table 4.8
Type
Trap instruction
Illegal slot
instruction
General illegal
instructions
4.5.2
Trap instruction exception handling is carried out when a trap instruction (TRAPA) is executed.
The CPU then:
1. Saves the status register by pushing register contents onto the stack.
2. Pushes the program counter value onto the stack. The PC value saved is the start address of the
3. Reads the exception handling routine start address from the vector table corresponding to the
next instruction after the TRAPA instruction.
vector number specified in the TRAPA instruction, branches to that address, and starts
program execution. The branch is not a delayed branch.
Instruction Exceptions
Types of Instruction Exceptions
Trap Instruction
Types of Instruction Exceptions
Source Instruction
TRAPA
Undefined code or instruction
that rewrites the PC located
immediately after a delayed
branch instruction (delay slot)
Undefined code in other than
delay slot
Comments
Delayed branch instructions are: JMP, JSR,
BRA, BSR, RTS, RTE. Instructions that
rewrite the PC are: JMP, JSR, BRA, BSR,
RTS, RTE, BT, BF, and TRAPA
Rev. 7.00 Jan 31, 2006 page 61 of 658
Section 4 Exception Handling
REJ09B0272-0700

Related parts for HD6417034B