HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 229

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HD6417034B

Manufacturer Part Number
HD6417034B
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Dual Address Mode
In dual address mode, both the transfer source and destination are accessed (selectable) by an
address. The source and destination can be located externally or internally. The source is
accessed in the read cycle and the destination in the write cycle, so the transfer is performed in
two separate bus cycles. The transfer data is temporarily stored in the DMAC. Figure 9.8
shows an example of a transfer between two external memories in which data is read from one
memory in the read cycle and written to the other memory in the following write cycle.
D15–D0
A21–A0
DACK
D15–D0
A21–A0
CSn
DACK
RD
WRH
CK
WRL
CSn
Figure 9.7 Examples of DMA Transfer Timing in Single Address Mode
CK
(a) External device with DACK to external memory space
(b) External memory space to external device with DACK
Section 9 Direct Memory Access Controller (DMAC)
Address output to external memory space
Data output from external memory space
RD signal to external memory space
DACK signal to external device with DACK
(active-low)
Address output to external memory space
Data output from external device with DACK
DACK signal to external device with DACK
(active-low)
WR signal to external memory space
Rev. 7.00 Jan 31, 2006 page 203 of 658
REJ09B0272-0700

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