HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 316

• Manufacturer Part Number: HD6417034B
• Description: 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
10.5
The ITU has two interrupt sources: input capture/compare match and overflow.
10.5.1
Timing for Setting IMFA and IMFB in a Compare Match: The IMF bits in TSR are set to 1 by
a compare match signal generated when TCNT matches a general register. The compare match
signal is generated in the last state in which the values match (when TCNT is updated from the
matching count to the next count). Therefore, when TCNT matches GRA or GRB, the compare
match signal is not generated until the next timer clock input. Figure 10.54 shows the timing of
setting the IMF bits.
Rev. 7.00 Jan 31, 2006 page 290 of 658
REJ09B0272-0700
match signal
input clock
Compare
Interrupts
Timing of Setting Status Flags
TCNT
TCNT
Figure 10.54 Timing of Setting Compare Match Flags (IMFA, IMFB)
IMF
GR
CK
IMI
N
N
N + 1