HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 50

• Manufacturer Part Number: HD6417034B
• Description: 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 2 CPU
2.3.2
Addressing modes and effective address calculation are described in table 2.8.
Table 2.8
Addressing
Mode
Direct
register
addressing
Indirect
register
addressing
Post-incre-
ment
indirect
register
addressing
Pre-decre-
ment
indirect
register
addressing
Rev. 7.00 Jan 31, 2006 page 24 of 658
REJ09B0272-0700
Addressing Modes
Addressing Modes and Effective Addresses
Mnemonic
Expression
Rn
@Rn
@Rn +
@–Rn
Effective Addresses Calculation
The effective address is register Rn. (The operand
is the contents of register Rn.)
The effective address is the contents of register Rn.
The effective address is the contents of register Rn.
A constant is added to the contents of Rn after the
instruction is executed. 1 is added for a byte
operation, 2 for a word operation, and 4 for a
longword operation.
The effective address is the value obtained by
subtracting a constant from Rn. 1 is subtracted for
a byte operation, 2 for a word operation, and 4 for a
longword operation.
1/2/4
1/2/4
Rn
Rn
Rn
Rn + 1/2/4
Rn – 1/2/4
+
–
Rn – 1/2/4
Rn
Rn
Equation
—
Rn
Rn
(After the
instruction is
executed)
Byte: Rn + 1
Word: Rn + 2
Longword:
Rn + 4
Byte: Rn – 1
Word: Rn – 2
Longword:
Rn – 4
(Instruction
executed
with Rn after
calculation)
Rn
Rn
Rn
Rn
Rn
Rn