HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 53

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HD6417034B

Manufacturer Part Number
HD6417034B
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Addressing
Mode
PC relative
addressing
Immediate
addressing
2.3.3
The instruction format refers to the source operand and the destination operand. The meaning of
the operand depends on the instruction code. Symbols are as follows.
xxxx
mmmm Source register
nnnn
iiii
dddd
Instruction Formats
Mnemonic
Expression
Rn
#imm:8
#imm:8
#imm:8
Instruction code
Destination register
Immediate data
Displacement
Effective Addresses Calculation
The effective address is the PC value plus Rn.
The 8-bit immediate data (imm) for the TST, AND,
OR, and XOR instructions is zero-extended.
The 8-bit immediate data (imm) for the MOV, ADD,
and CMP/EQ instructions is sign-extended.
Immediate data (imm) for the TRAPA instruction is
zero-extended and is quadrupled.
PC
Rn
Rev. 7.00 Jan 31, 2006 page 27 of 658
PC + Rn
REJ09B0272-0700
Section 2 CPU
Equation
PC + Rn

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