LPC47S457-NC SMSC [SMSC Corporation], LPC47S457-NC Datasheet - Page 238
![no-image](/images/no-image-200.jpg)
LPC47S457-NC
Manufacturer Part Number
LPC47S457-NC
Description
Advanced I/O with X-Bus Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LPC47S457-NC.pdf
(259 pages)
- Current page: 238 of 259
- Download datasheet (2Mb)
11.6.1 ECP PARALLEL PORT TIMING
Parallel Port FIFO (Mode 101)
The standard parallel port is run at or near the peak 500KBytes/sec allowed in the forward direction using DMA. The
state machine does not examine nACK and begins the next transfer based on Busy. Refer to FIGURE 30.
ECP Parallel Port Timing
The timing is designed to allow operation at approximately 2.0 Mbytes/sec over a 15ft cable. If a shorter cable is
used then the bandwidth will increase.
Forward-Idle
When the host has no data to send it keeps HostClk (nStrobe) high and the peripheral will leave PeriphClk (Busy) low.
Forward Data Transfer Phase
The interface transfers data and commands from the host to the peripheral using an interlocked PeriphAck and
HostClk. The peripheral may indicate its desire to send data to the host by asserting nPeriphRequest.
The Forward Data Transfer Phase may be entered from the Forward-Idle Phase. While in the Forward Phase the
peripheral may asynchronously assert the nPeriphRequest (nFault) to request that the channel be reversed. When
the peripheral is not busy it sets PeriphAck (Busy) low. The host then sets HostClk (nStrobe) low when it is prepared
to send data. The data must be stable for the specified setup time prior to the falling edge of HostClk. The peripheral
then sets PeriphAck (Busy) high to acknowledge the handshake. The host then sets HostClk (nStrobe) high. The
peripheral then accepts the data and sets PeriphAck (Busy) low, completing the transfer. This sequence is shown in
FIGURE 31.
The timing is designed to provide 3 cable round-trip times for data setup if Data is driven simultaneously with HostClk
(nStrobe).
Reverse-Idle Phase
The peripheral has no data to send and keeps PeriphClk high. The host is idle and keeps HostAck low.
Reverse Data Transfer Phase
The interface transfers data and commands from the peripheral to the host using an interlocked HostAck and PeriphClk.
The Reverse Data Transfer Phase may be entered from the Reverse-Idle Phase. After the previous byte has beed
accepted the host sets HostAck (nALF) low. The peripheral then sets PeriphClk (nACK) low when it has data to send.
The data must be stable for the specified setup time prior to the falling edge of PeriphClk. When the host is ready to
accept a byte it sets HostAck (nALF) high to acknowledge the handshake. The peripheral then sets PeriphClk (nACK)
high. After the host has accepted the data it sets HostAck (nALF) low, completing the transfer. This sequence is
shown in FIGURE 32.
SMSC LPC47S45x
Page 238 of 259
Rev. 06-01-06
DATASHEET
Related parts for LPC47S457-NC
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![LAN83C183-JD](/images/no-image3.png)
Part Number:
Description:
FAST ETHERNET PHYSICAL LAYER DEVICE
Manufacturer:
SMSC Corporation
Datasheet:
![FDC37N769TQFP](/images/no-image3.png)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
SMSC Corporation
Datasheet:
![LPC47M102S-MC](/images/no-image3.png)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
SMSC Corporation
Datasheet:
![LPC47N267-MN](/images/no-image3.png)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
SMSC Corporation
Datasheet:
![USB20H04-JD](/images/no-image3.png)
Part Number:
Description:
4-PORT USB2.0 HUB CONTROLLER
Manufacturer:
SMSC Corporation
Datasheet:
![FDC37M602](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
![FDC37B777](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
![FDC37C672](/images/no-image3.png)
Part Number:
Description:
FDC37C672ENHANCED SUPER I/O CONTROLLER WITH FAST IR
Manufacturer:
SMSC Corporation
Datasheet:
![COM90C66LJP](/images/no-image3.png)
Part Number:
Description:
COM90C66LJPARCNET Controller/Transceiver with AT Interface and On-Chip RAM
Manufacturer:
SMSC Corporation
Datasheet:
![FDC37N869TQFP](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
![USB97C100QFP](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
![LPC47N227-MN](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
![FDC37N869](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
![LAN91C94](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet: