LPC47S457-NC SMSC [SMSC Corporation], LPC47S457-NC Datasheet - Page 195

• Manufacturer Part Number: LPC47S457-NC
• Description: Advanced I/O with X-Bus Interface
• Manufacturer: SMSC [SMSC Corporation]

9.2 Configuration Sequence
To program the configuration registers, the following sequence must be followed:
1.
2.
3.
Enter Configuration Mode
To place the chip into the Configuration State the Config Key is sent to the chip's CONFIG PORT. The config key
consists of 0x55 written to the CONFIG PORT. Once the configuration key is received correctly the chip enters into
the Configuration State (The auto Config ports are enabled).
Configuration Mode
The system sets the logical device information and activates desired logical devices through the INDEX and DATA
ports. In configuration mode, the INDEX PORT is located at the CONFIG PORT address and the DATA PORT is at
INDEX PORT address + 1.
The desired configuration registers are accessed in two steps:
a)
b)
Note: If accessing the Global Configuration Registers, step (a) is not required.
Exit Configuration Mode
To exit the Configuration State the system writes 0xAA to the CONFIG PORT. The chip returns to the RUN State.
Note: Only two states are defined (Run and Configuration). In the Run State the chip will always be ready to enter the
Configuration State.
9.3 Programming Example
The following is an example of a configuration program in Intel 8086 assembly language.
;----------------------------.
; ENTER CONFIGURATION MODE
;----------------------------'
MOV
MOV
OUT
;----------------------------.
; CONFIGURE REGISTER CRE0,
; LOGICAL DEVICE 8
;----------------------------'
MOV
MOV
OUT
MOV
MOV
Notes: PCI RESET: PCI_RESET# pin asserted
SMSC LPC47S45x
Enter Configuration Mode
Configure the Configuration Registers
Exit Configuration Mode.
Write the index of the Logical Device Number Configuration Register (i.e., 0x07) to the INDEX PORT and then
write the number of the desired logical device to the DATA PORT.
Write the address of the desired configuration register within the logical device to the INDEX PORT and then
write or read the configuration register through the DATA PORT.
SOFT RESET: Bit 0 of Configuration Control register set to one
All host accesses are blocked for 500µs after VCC POR (see Power-up Timing Diagram)
DX,02EH
AX,055H
DX,AL
DX,02EH
AL,07H
DX,AL ;Point to LD# Config Reg
DX,02FH
AL, 08H
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DATASHEET
Page 195 of 259
OUT
;
MOV
MOV
OUT
MOV
MOV
OUT
;-----------------------------.
; EXIT CONFIGURATION MODE
;-----------------------------'
MOV
MOV
OUT
DX,AL;Point to Logical Device 8
DX,02EH
AL,E0H
DX,AL ; Point to CRE0
DX,02fH
AL,02H
DX,AL ; Update CRE0
DX,02EH
AX,0AAH
DX,AL
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Rev. 06-01-06