LPC47S457-NC SMSC [SMSC Corporation], LPC47S457-NC Datasheet - Page 200
![no-image](/images/no-image-200.jpg)
LPC47S457-NC
Manufacturer Part Number
LPC47S457-NC
Description
Advanced I/O with X-Bus Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LPC47S457-NC.pdf
(259 pages)
- Current page: 200 of 259
- Download datasheet (2Mb)
SMSC LPC47S45x
PowerControl
Default = 0x00.
on VCC POR,
VTR POR,
PCI RESET and SOFT
RESET
Power Mgmt
Default = 0x00.
on VCC POR,
VTR POR and
PCI RESET
OSC
Default = 0x04
on VCC POR ,
VTR POR and
PCI RESET
Chip Level
Vendor Defined
Configuration Port
Address Byte 0
(Low Byte)
Default
=0x2E (Sysopt=0)
=0x4E (Sysopt=1)
on VCC POR and PCI
RESET
REGISTER
ADDRESS
(Type)
(R/W)
(R/W)
(R/W)
(R/W)
0x22
0x23
0x24
0x25
0x26
Table 82 − Chip Level Registers
Bit[0] FDC Power
Bit[1] Reserved
Bit[2] Reserved
Bit[3] Parallel Port Power
Bit[4] Serial Port 1 Power
Bit[5] Serial Port 2 Power
Bit[6] Reserved
Bit[7] Reserved
0: Power Off or Disabled
1: Power On or Enabled
Bit[0] FDC (see Note in the “FDC Power Management” section.)
Bit[1] Reserved
Bit[2] Reserved
Bit[3] Parallel Port
Bit[4] Serial Port 1
Bit[5] Serial Port 2
Bit[7:6] Reserved (read as 0)
For each bit above (except Reserved)
= 0
= 1
Bit[0] Reserved
Bit [1] PLL Control
= 0
= 1
Bits[3:2] OSC
= 01
= 10
= 00
= 11
Bit [5:4] Reserved, set to zero
Bit [6] 16-Bit Address Qualification
= 0
= 1
Note: For normal operation, bit 6 should be set.
Bit[7] Reserved
Reserved - Writes are ignored, reads return 0.
Bit[7:1] Configuration Address Bits [7:1]
Bit[0] = 0
(See Note 1)
DATASHEET
Intelligent Pwr Mgmt off
Intelligent Pwr Mgmt on
Osc is on, BRG clock is on.
Same as above (01) case.
Osc is on, BRG Clock Enabled.
Osc is off, BRG clock is disabled.
12-Bit Address Qualification
16-Bit Address Qualification
PLL is on (backward Compatible)
PLL is off
Page 200 of 259
DESCRIPTION
Rev. 06-01-06
STATE
C
C
C
C
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