LPC47S457-NC SMSC [SMSC Corporation], LPC47S457-NC Datasheet - Page 231
![no-image](/images/no-image-200.jpg)
LPC47S457-NC
Manufacturer Part Number
LPC47S457-NC
Description
Advanced I/O with X-Bus Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LPC47S457-NC.pdf
(259 pages)
- Current page: 231 of 259
- Download datasheet (2Mb)
11.4 LPC Interface
Note 1: The PCI_RESET# width is dependent upon the PCI clock. The PCI_RESET# must be active low for a
SMSC LPC47S45x
NAME
NAME
minumum of 100 μ sec while the clock is running and stable and a minimum of 1ms after the system power
good signal is asserted
NAME
t1
t2
t3
t4
t5
Tri-State Output
t4
t1
t2
t3
Output Delay
P C I_ C L K
Period
High Time
Low Time
Rise Time
Fall Time
PCI_RESET# width (Note 1)
CLK to Signal Valid Delay – Bused Signals
Float to Active Delay
Active to Float Delay
FIGURE 18 − OUTPUT TIMING MEASUREMENT CONDITIONS, LPC SIGNALS
PCI_RESET#
CLK
DESCRIPTION
DESCRIPTION
DESCRIPTION
FIGURE 16 − PCI CLOCK TIMING
FIGURE 17 − RESET TIMING
t5
DATASHEET
t1
Page 231 of 259
t2
t1
t4
t3
t3
MIN
MIN
2
2
30
12
12
MIN
1
t4
t2
TYP
TYP
TYP
MAX
MAX
MAX
33.3
11
11
28
3
3
UNITS
UNITS
UNITS
nsec
nsec
nsec
nsec
nsec
ms
ns
ns
ns
Rev. 06-01-06
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