LPC47S457-NC SMSC [SMSC Corporation], LPC47S457-NC Datasheet - Page 190
LPC47S457-NC
Manufacturer Part Number
LPC47S457-NC
Description
Advanced I/O with X-Bus Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LPC47S457-NC.pdf
(259 pages)
- Current page: 190 of 259
- Download datasheet (2Mb)
SMSC LPC47S45x
GPE1_STS 1
Default = 0x00 on
VTR POR
NAME
REG OFFSET
(R/W)
(hex)
7C
DATASHEET
General Purpose Event 1 Status Register 1 (GPE1_STS 1)
Bit[0] GP23_STS
GP23 event status (low-to-high edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[1] GP34_STS
GP34 event status (low-to-high edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[2] GP35_STS
GP35 event status (low-to-high edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[3] KDAT_STS
KBD event status (high-to-low edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[4] MDAT_STS
Mouse event status (high-to-low edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[5] SPEKEY_STS
SPEKEY event status (low-to-high edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[6] nRI1_STS
RI1 event status (high-to-low edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[7] ALL_PME_STS
ALL_PME event status (low-to-high edge with non inverted
polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Page 190 of 259
DESCRIPTION
Rev. 06-01-06
Related parts for LPC47S457-NC
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
FAST ETHERNET PHYSICAL LAYER DEVICE
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
4-PORT USB2.0 HUB CONTROLLER
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
FDC37C672ENHANCED SUPER I/O CONTROLLER WITH FAST IR
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
COM90C66LJPARCNET Controller/Transceiver with AT Interface and On-Chip RAM
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet: