LPC47S457-NC SMSC [SMSC Corporation], LPC47S457-NC Datasheet - Page 189

• Manufacturer Part Number: LPC47S457-NC
• Description: Advanced I/O with X-Bus Interface
• Manufacturer: SMSC [SMSC Corporation]

SMSC LPC47S45x
PM1_EN 1
Default = 0x00 on
Vbat POR
PM1_EN 2
Default = 0x00 on
Vbat POR
NAME
REG OFFSET
(R/W)
(R/W)
(hex)
7A
7B
DATASHEET
Power Management 1 Enable Register 1 (PM1_EN 1)
Bit[7:0] = Reserved. These bits always return a value of zero.
Power Management 1 Enable Register 2 (PM1_EN 2)
Bit[0] PWRBTN_EN
This bit is used to enable the assertion of the nPB_IN to generate
a event. The PWRBTN_STS bit is set anytime the nPB_IN signal
is asserted. The enable bit does not have to be set to enable the
setting of the PWRBTN_STS bit by the assertion of the nPB_IN
signal. A wake-up event (nPS_ON transitions to active low) is
generated regardless of the setting of PWRBTN_EN.
Bit[1] Reserved
Bit[2] RTC_EN
This bit is used to enable the setting of the RTC_STS bit to
generate an PME and wake event.
anytime the RTC generates an alarm. If the RTC_EN bit is not set,
then setting the RTC_STS bit will not generate a PME or wake
event.
Bit[3] Reserved
Bit[4] Reserved
Bit[5] Reserved
Bit[6] Reserved
Bit[7] Reserved
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DESCRIPTION
The RTC_STS bit is set
Rev. 06-01-06