LPC47S457-NC SMSC [SMSC Corporation], LPC47S457-NC Datasheet - Page 191

• Manufacturer Part Number: LPC47S457-NC
• Description: Advanced I/O with X-Bus Interface
• Manufacturer: SMSC [SMSC Corporation]

SMSC LPC47S45x
GPE1_STS 2
Default = 0x00 on
VTR POR
NAME
REG OFFSET
(R/W)
(hex)
7D
DATASHEET
General Purpose Event 1 Status Register 2 (GPE1_STS 2)
Bit[0] GP50_STS
GP50/RI2 event status (low-to-high edge with non inverted
polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[1] GP51_STS
GP51 event status (low-to-high edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[2] GP52_STS
GP52 event status (low-to-high edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[3] GP53_STS
GP53 event status (low-to-high edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[4] GP54_STS
GP54 event status (low-to-high edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[5] GP55_STS
GP55 event status (low-to-high edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[6] GP56_STS
GP56 event status (low-to-high edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Bit[7] GP57_STS
GP57 event status (low-to-high edge with non inverted polarity).
1= event occurred, 0= event did not occur.
This bit is cleared by software writing a one to this bit position and
by VTR POR. Writing a 0 has no effect.
Page 191 of 259
DESCRIPTION
Rev. 06-01-06