PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 98

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PIC18F13K50-E/P

Manufacturer Part Number
PIC18F13K50-E/P
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC18F1XK50/PIC18LF1XK50
9.5
The output slew rate of each port is programmable to
select either the standard transition rate or a reduced
transition rate of 0.1 times the standard to minimize
EMI. The reduced transition time is the default slew
rate for all ports.
REGISTER 9-17:
DS41350C-page 96
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2
bit 1
bit 0
Note 1: The slew rate of RA4 defaults to standard rate when the pin is used as CLKOUT.
U-0
Port Slew Rate Control
Unimplemented: Read as ‘0’
SLRC: PORTC Slew Rate Control bit
1 = All outputs on PORTC slew at 0.1 times the standard rate
0 = All outputs on PORTC slew at the standard rate
SLRB: PORTB Slew Rate Control bit
1 = All outputs on PORTB slew at 0.1 times the standard rate
0 = All outputs on PORTB slew at the standard rate
SLRA: PORTA Slew Rate Control bit
1 = All outputs on PORTA slew at 0.1 times the standard rate
0 = All outputs on PORTA slew at the standard rate
U-0
SLRCON: SLEW RATE CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
(1)
R/W-1
SLRC
© 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-1
SLRB
R/W-1
SLRA
bit 0

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