PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 141

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PIC18F13K50-E/P

Manufacturer Part Number
PIC18F13K50-E/P
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
15.2.3
To enable the serial port, SSP Enable bit, SSPEN of the
SSPCON1 register, must be set. To reset or reconfig-
ure SPI mode, clear the SSPEN bit, reinitialize the
SSPCON registers and then set the SSPEN bit. This
configures the SDI, SDO, SCK and SS pins as serial
port pins. For the pins to behave as the serial port func-
tion, some must have their data direction bits (in the
TRIS register) appropriately programmed as follows:
• SDI is automatically controlled by the SPI module
• SDO must have corresponding TRIS bit cleared
• SCK (Master mode) must have corresponding
• SCK (Slave mode) must have corresponding
• SS must have corresponding TRIS bit set
Any serial port function that is not desired may be
overridden by programming the corresponding data
direction (TRIS) register to the opposite value.
FIGURE 15-2:
© 2009 Microchip Technology Inc.
TRIS bit cleared
TRIS bit set
SPI Master SSPM<3:0> = 00xx
ENABLING SPI I/O
MSb
Serial Input Buffer
Processor 1
Shift Register
TYPICAL SPI MASTER/SLAVE CONNECTION
(SSPBUF)
(SSPSR)
LSb
General I/O
PIC18F1XK50/PIC18LF1XK50
SCK
SDO
SDI
Preliminary
Serial Clock
Slave Select
(optional)
15.2.4
Figure 15-2 shows a typical connection between two
microcontrollers. The master controller (Processor 1)
initiates the data transfer by sending the SCK signal.
Data is shifted out of both shift registers on their pro-
grammed clock edge and latched on the opposite edge
of the clock. Both processors should be programmed to
the same Clock Polarity (CKP), then both controllers
would send and receive data at the same time.
Whether the data is meaningful (or dummy data)
depends on the application software. This leads to
three scenarios for data transmission:
• Master sends data – Slave sends dummy data
• Master sends data – Slave sends data
• Master sends dummy data – Slave sends data
SDO
SCK
SDI
SS
TYPICAL CONNECTION
SPI Slave SSPM<3:0> = 010x
MSb
Serial Input Buffer
Shift Register
(SSPBUF)
(SSPSR)
Processor 2
LSb
DS41350C-page 139

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