PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 200
PIC18F13K50-E/P
Manufacturer Part Number
PIC18F13K50-E/P
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F13K50-EP.pdf
(414 pages)
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PIC18F1XK50/PIC18LF1XK50
16.4.1.5
1.
2.
FIGURE 16-10:
FIGURE 16-11:
DS41350C-page 198
TX/CK pin
(SCKP = 0)
TX/CK pin
(SCKP = 1)
TRMT bit
RX/DT
pin
Write to
TXREG Reg
TXIF bit
(Interrupt Flag)
TXEN bit
Note:
Initialize the SPBRGH, SPBRG register pair and
the BRGH and BRG16 bits to achieve the
desired baud rate (see Section 16.3 “EUSART
Baud Rate Generator (BRG)”).
Enable the synchronous master serial port by
setting bits SYNC, SPEN and CSRC. Set the
TRIS bits corresponding to the RX/DT and
TX/CK I/O pins.
‘1’
Synchronous Master Transmission
Set-up:
Sync Master mode, SPBRG = 0, continuous transmission of two 8-bit words.
Write Word 1
TXREG reg
RX/DT pin
TX/CK pin
TRMT bit
TXEN bit
TXIF bit
Write to
SYNCHRONOUS TRANSMISSION
SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
bit 0
Write Word 2
bit 1
Word 1
bit 0
bit 2
Preliminary
bit 1
bit 7
3.
4.
5.
6.
7.
8.
Disable Receive mode by clearing bits SREN
and CREN.
Enable Transmit mode by setting the TXEN bit.
If 9-bit transmission is desired, set the TX9 bit.
If interrupts are desired, set the TXIE, GIE and
PEIE interrupt enable bits.
If 9-bit transmission is selected, the ninth bit
should be loaded in the TX9D bit.
Start transmission by loading data to the TXREG
register.
bit 2
bit 0
Word 2
bit 1
bit 6
© 2009 Microchip Technology Inc.
bit 7
bit 7
‘1’
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