PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 215
PIC18F13K50-E/P
Manufacturer Part Number
PIC18F13K50-E/P
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F13K50-EP.pdf
(414 pages)
- Current page: 215 of 414
- Download datasheet (7Mb)
REGISTER 17-3:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-3
bit 2-0
Note 1:
ADFM
R/W-0
When the A/D clock source is selected as F
cycle after the GO/DONE bit is set to allow the SLEEP instruction to be executed.
ADFM: A/D Conversion Result Format Select bit
1 = Right justified
0 = Left justified
Unimplemented: Read as ‘0’
ACQT<2:0>: A/D Acquisition time select bits. Acquisition time is the duration that the A/D charge
holding capacitor remains connected to A/D channel from the instant the GO/DONE bit is set until
conversions begins.
000 = 0
001 = 2 T
010 = 4 T
011 = 6 T
100 = 8 T
101 = 12 T
110 = 16 T
111 = 20 T
ADCS<2:0>: A/D Conversion Clock Select bits
000 = F
001 = F
010 = F
011 = F
100 = F
101 = F
110 = F
111 = F
U-0
—
ADCON2: A/D CONTROL REGISTER 2
(1)
OSC
OSC
OSC
RC
OSC
OSC
OSC
RC
AD
AD
AD
AD
(1)
(1)
AD
AD
AD
/2
/8
/32
/4
/16
/64
(clock derived from a dedicated internal oscillator = 600 kHz nominal)
(clock derived from a dedicated internal oscillator = 600 kHz nominal)
W = Writable bit
‘1’ = Bit is set
ACQT2
R/W-0
PIC18F1XK50/PIC18LF1XK50
ACQT1
R/W-0
Preliminary
RC
then the start of conversion is delayed by one instruction
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ACQT0
R/W-0
ADCS2
R/W-0
x = Bit is unknown
ADCS1
R/W-0
DS41350C-page 213
ADCS0
R/W-0
bit 0
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