PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 135

• Manufacturer Part Number: PIC18F13K50-E/P
• Manufacturer: MICROCHIP [Microchip Technology]

TABLE 14-3:
© 2009 Microchip Technology Inc.
INTCON
RCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
TRISC
TMR1L
TMR1H
T1CON
TMR2
T2CON
PR2
TMR3L
TMR3H
T3CON
CCPR1L
CCPR1H
CCP1CON
ECCP1AS
PWM1CON
Legend:
Name
— = unimplemented, read as ‘0’. Shaded cells are not used during ECCP operation.
Timer1 Register, Low Byte
Timer1 Register, High Byte
Timer2 Register
Timer2 Period Register
Timer3 Register, Low Byte
Timer3 Register, High Byte
Capture/Compare/PWM Register 1, Low Byte
Capture/Compare/PWM Register 1, High Byte
ECCPASE ECCPAS2
GIE/GIEH PEIE/GIEL
OSCFIF
OSCFIE
OSCFIP
TRISC7
PRSEN
RD16
RD16
P1M1
IPEN
Bit 7
—
—
—
—
REGISTERS ASSOCIATED WITH ECCP1 MODULE AND TIMER1 TO TIMER3
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
SBOREN
TRISC6
T1RUN
PDC6
P1M0
ADIF
ADIE
ADIP
Bit 6
C1IF
C1IE
C1IP
—
ECCPAS1
T1CKPS1
T3CKPS1
TMR0IE
TRISC5
DC1B1
PDC5
RCIF
RCIE
RCIP
C2IE
C2IP
Bit 5
C2IF
PIC18F1XK50/PIC18LF1XK50
—
ECCPAS0
T1CKPS0
T3CKPS0
Preliminary
TRISC4
DC1B0
INT0IE
PDC4
TXIE
TXIP
EEIF
EEIE
EEIP
Bit 4
TXIF
RI
T1OSCEN
T3CCP1
CCP1M3
PSSAC1
TRISC3
RABIE
SSPIF
SSPIE
SSPIP
BCLIF
BCLIE
BCLIP
PDC3
Bit 3
TO
T1SYNC
T3SYNC
CCP1M2
PSSAC0
TMR0IF
CCP1IF
CCP1IE
CCP1IP
TRISC2
USBIE
USBIP
USBIF
PDC2
Bit 2
PD
TMR1CS
TMR3CS
CCP1M1
PSSBD1
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
TRISC1
INT0IF
PDC1
Bit 1
POR
TMR1ON
TMR3ON
CCP1M0
PSSBD0
TMR1IF
TMR1IE
TMR1IP
TRISC0
DS41350C-page 133
RABIF
PDC0
Bit 0
BOR
–
–
–
on page
Values
Reset
279
278
282
282
282
282
282
282
282
280
280
280
280
280
280
281
281
281
281
281
281
281
281