PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 295
PIC18F13K50-E/P
Manufacturer Part Number
PIC18F13K50-E/P
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F13K50-EP.pdf
(414 pages)
- Current page: 295 of 414
- Download datasheet (7Mb)
REGISTER 24-9:
REGISTER 24-10: CONFIG6H: CONFIGURATION REGISTER 6 HIGH
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5
bit 4-0
Note 1:
WRTD
R/C-1
U-0
—
This bit is read-only in normal execution mode; it can be written only in Program mode.
Unimplemented: Read as ‘0’
WRT1: Write Protection bit
1 = Block 1 not write-protected
0 = Block 1 write-protected
WRT0: Write Protection bit
1 = Block 0 not write-protected
0 = Block 0 write-protected
WRTD: Data EEPROM Write Protection bit
1 = Data EEPROM not write-protected
0 = Data EEPROM write-protected
WRTB: Boot Block Write Protection bit
1 = Boot block not write-protected
0 = Boot block write-protected
WRTC: Configuration Register Write Protection bit
1 = Configuration registers not write-protected
0 = Configuration registers write-protected
Unimplemented: Read as ‘0’
WRTB
R/C-1
U-0
—
CONFIG6L: CONFIGURATION REGISTER 6 LOW
WRTC
U-0
R-1
—
(1)
PIC18F1XK50/PIC18LF1XK50
U-0
U-0
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
U-0
U-0
—
—
(1)
U-0
U-0
—
—
WRT1
R/C-1
U-0
—
DS41350C-page 293
WRT0
R/C-1
U-0
—
bit 0
bit 0
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