PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 223

• Manufacturer Part Number: PIC18F13K50-E/P
• Manufacturer: MICROCHIP [Microchip Technology]

FIGURE 18-3:
© 2009 Microchip Technology Inc.
V
FVR
C2RSEL
REF
C12IN1-
C12IN2-
C12IN3-
C2IN+
C2CH<1:0>
AGND
0
1
MUX
C2V
COMPARATOR C2 SIMPLIFIED BLOCK DIAGRAM
C2R
REF
Note 1:
0
1
0
1
2
3
MUX
2
MUX
2:
3:
4:
C2V
C2V
When C2ON = 0, the C2 comparator will produce a ‘0’ output to the XOR Gate.
Q1 and Q3 are phases of the four-phase system clock (F
Q1 is held high during Sleep mode.
Positive going pulse generated on both falling and rising edges of the bit.
C2SP
IN
IN
PIC18F1XK50/PIC18LF1XK50
-
+
C2
From TMR1L[0]
C2ON
C2POL
Preliminary
(1)
Q3*RD_CM2CON0
(4)
Q1
D
NRESET
Q
C2OUT
D
EN
C2SYNC
Q
D
EN
0
1
CL
Q
OSC
C20E
RD_CM2CON0
SYNCC2OUT
To PWM Logic
).
Data Bus
Set C2IF
C12OUT pin
DS41350C-page 221
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