PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 213

• Manufacturer Part Number: PIC18F13K50-E/P
• Manufacturer: MICROCHIP [Microchip Technology]

17.2.10
The following registers are used to control the opera-
tion of the ADC.
REGISTER 17-1:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-2
bit 1
bit 0
Note 1:
Note:
U-0
—
Selecting reserved channels will yield unpredictable results as unimplemented input channels are left
floating.
ADC REGISTER DEFINITIONS
Analog pin control is performed by the
ANSEL and ANSELH registers. For ANSEL
and ANSELH registers, see Register 9-15
and Register 9-16, respectively.
Unimplemented: Read as ‘0’
CHS<3:0>: Analog Channel Select bits
0000 = Reserved
0001 = Reserved
0010 = Reserved
0011 = AN3
0100 = AN4
0101 = AN5
0110 = AN6
0111 = AN7
1000 = AN8
1001 = AN9
1010 = AN10
1011 = AN11
1100 = Reserved
1101 = Reserved
1110 = DAC
1111 = FVR
GO/DONE: A/D Conversion Status bit
1 = A/D conversion cycle in progress. Setting this bit starts an A/D conversion cycle.
0 = A/D conversion completed/not in progress
ADON: ADC Enable bit
1 = ADC is enabled
0 = ADC is disabled and consumes no operating current
This bit is automatically cleared by hardware when the A/D conversion has completed.
U-0
—
ADCON0: A/D CONTROL REGISTER 0
W = Writable bit
‘1’ = Bit is set
CHS3
R/W-0
PIC18F1XK50/PIC18LF1XK50
CHS2
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CHS1
R/W-0
CHS0
R/W-0
x = Bit is unknown
GO/DONE
R/W-0
DS41350C-page 211
ADON
R/W-0
bit 0