PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 389

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PIC18F13K50-E/P

Manufacturer Part Number
PIC18F13K50-E/P
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
TABLE 27-15: SPI MODE REQUIREMENTS
FIGURE 27-19:
© 2009 Microchip Technology Inc.
Param
SP70* T
SP71* T
SP72* T
SP73* T
SP74* T
SP75* T
SP76* T
SP77* T
SP78* T
SP79* T
SP80* T
SP81* T
SP82* T
SP83* T
No.
SCL
SDA
Note: Refer to Figure 27-2 for load conditions.
*
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
T
T
T
T
T
T
SS
SS
SC
SC
SC
SC
SS
SC
SC
SC
SC
SS
SC
SC
DI
DI
DO
DO
DO
DO
Symbol
These parameters are characterized but not tested.
only and are not tested.
V2
V2
L2
L2
H
L
H2
L2
H2
R
F
H2
L2
L2
H2
L2
R
F
V2
V2
SC
SC
SC
SC
DO
SP90
DI
DO
SS
DI
DO
DO
SS
SC
SC
L
L,
H,
L
H,
L
H
V
V
H,
Z
V,
H,
L
SS↓ to SCK↓ or SCK↑ input
SCK input high time (Slave mode)
SCK input low time (Slave mode)
Setup time of SDI data input to SCK edge
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SS↑ to SDO output high-impedance
SCK output rise time
(Master mode)
SCK output fall time (Master mode)
SDO data output valid after
SCK edge
SDO data output setup to SCK edge
SDO data output valid after SS↓ edge
SS ↑ after SCK edge
I
2
Condition
C™ BUS START/STOP BITS TIMING
Start
SP91
Characteristic
PIC18F1XK50/PIC18LF1XK50
Preliminary
3.0-5.5V
1.8-5.5V
3.0-5.5V
1.8-5.5V
3.0-5.5V
1.8-5.5V
1.5T
T
T
CY
CY
Min
T
100
100
Tcy
CY
10
CY
+ 20
+ 20
+ 40
SP92
Typ†
10
25
10
10
25
10
Condition
Max Units Conditions
Stop
145
25
50
25
50
25
50
25
50
50
DS41350C-page 387
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SP93

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