PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 403

• Manufacturer Part Number: PIC18F13K50-E/P
• Manufacturer: MICROCHIP [Microchip Technology]

DC and AC Characteristics
DC Characteristics
DCFSNZ .......................................................................... 323
DECF ............................................................................... 322
DECFSZ ........................................................................... 323
Development Support ...................................................... 353
Device Differences ........................................................... 397
Device Overview .................................................................. 5
Device Reset Timers ........................................................ 275
DEVID1 Register .............................................................. 295
DEVID2 Register .............................................................. 295
Direct Addressing ............................................................... 43
E
ECCPAS Register ............................................................ 125
EECON1 Register ........................................................ 49, 58
Effect on Standard PIC Instructions ................................. 350
Electrical Specifications ................................................... 357
Enhanced Capture/Compare/PWM (ECCP) .................... 113
Enhanced Universal Synchronous Asynchronous Receiver
Equations
Errata ................................................................................... 4
EUSART .......................................................................... 177
© 2009 Microchip Technology Inc.
Graphs and Tables .................................................. 391
Extended and Industrial ........................................... 368
Industrial and Extended ........................................... 358
Details on Individual Family Members ......................... 6
Features (28-Pin Devices) ........................................... 7
New Core Features ...................................................... 5
Other Special Features ................................................ 6
Oscillator Start-up Timer (OST) ............................... 275
PLL Lock Time-out ................................................... 275
Power-up Timer (PWRT) ......................................... 275
Time-out Sequence .................................................. 275
Associated Registers ............................................... 133
Enhanced PWM Mode ............................................. 117
Outputs and Configuration ....................................... 114
Specifications ........................................................... 381
Transmitter (EUSART) ............................................. 177
Estimating USB Transceiver Current Consumption . 267
Asynchronous Mode ................................................ 179
Baud Rate Generator (BRG)
Auto-Restart ..................................................... 126
Auto-shutdown ................................................. 125
Direction Change in Full-Bridge Output Mode . 123
Full-Bridge Application ..................................... 121
Full-Bridge Mode ............................................. 121
Half-Bridge Application .................................... 120
Half-Bridge Application Examples ................... 127
Half-Bridge Mode ............................................. 120
Output Relationships (Active-High and
Output Relationships Diagram ......................... 119
Programmable Dead Band Delay .................... 127
Shoot-through Current ..................................... 127
Start-up Considerations ................................... 124
12-bit Break Transmit and Receive ................. 196
Associated Registers, Receive ........................ 185
Associated Registers, Transmit ....................... 181
Auto-Wake-up on Break .................................. 194
Baud Rate Generator (BRG) ........................... 189
Clock Accuracy ................................................ 186
Receiver ........................................................... 182
Setting up 9-bit Mode with Address Detect ...... 184
Transmitter ....................................................... 179
Associated Registers ....................................... 189
Active-Low) .............................................. 118
PIC18F1XK50/PIC18LF1XK50
Preliminary
Extended Instruction Set
F
Fail-Safe Clock Monitor ............................................. 22, 285
Fast Register Stack ........................................................... 28
Firmware Instructions ...................................................... 303
Flash Program Memory ..................................................... 47
Clock polarity
Data polarity
Interrupts
Synchronous Master Mode .............................. 197, 202
Synchronous Slave Mode
ADDFSR .................................................................. 346
ADDULNK ............................................................... 346
and Using MPLAB Tools ......................................... 352
CALLW .................................................................... 347
Considerations for Use ............................................ 350
MOVSF .................................................................... 347
MOVSS .................................................................... 348
PUSHL ..................................................................... 348
SUBFSR .................................................................. 349
SUBULNK ................................................................ 349
Syntax ...................................................................... 345
Fail-Safe Condition Clearing ...................................... 23
Fail-Safe Detection .................................................... 22
Fail-Safe Operation ................................................... 22
Reset or Wake-up from Sleep ................................... 23
Associated Registers ................................................. 55
Control Registers ....................................................... 48
Erase Sequence ........................................................ 52
Erasing ...................................................................... 52
Operation During Code-Protect ................................. 55
Reading ..................................................................... 51
Table Pointer
Table Pointer Boundaries .......................................... 50
Table Reads and Table Writes .................................. 47
Write Sequence ......................................................... 53
Writing To .................................................................. 53
Auto Baud Rate Detect .................................... 193
Baud Rate Error, Calculating ........................... 189
Baud Rates, Asynchronous Modes ................. 190
Formulas .......................................................... 189
High Baud Rate Select (BRGH Bit) ................. 189
Synchronous Mode .......................................... 197
Asynchronous Receive .................................... 182
Asynchronous Transmit ................................... 179
Synchronous Mode .......................................... 197
Asynchronous Receive .................................... 183
Asynchronous Transmit ................................... 179
Associated Registers, Receive ........................ 201
Associated Registers, Transmit ............... 199, 202
Reception ........................................................ 200
Transmission ................................................... 197
Associated Registers, Receive ........................ 203
Reception ........................................................ 203
Transmission ................................................... 202
EECON1 and EECON2 ..................................... 48
TABLAT (Table Latch) Register ........................ 50
TBLPTR (Table Pointer) Register ...................... 50
Boundaries Based on Operation ....................... 50
Protection Against Spurious Writes ................... 55
Unexpected Termination ................................... 55
Write Verify ........................................................ 55
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