PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 270

PIC18F13K50-E/P

Manufacturer Part Number

PIC18F13K50-E/P

Description

Manufacturer

MICROCHIP [Microchip Technology]

Datasheet

1.PIC18F13K50-EP.pdf (414 pages)

Current page: 270 of 414
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PIC18F1XK50/PIC18LF1XK50

22.7

The USB module has specific clock requirements. For

full-speed operation, the clock source must be 48 MHz.

Even so, the microcontroller core and other peripherals

are not required to run at that clock speed. Available

clocking options are described in detail in Section 2.11

“USB Operation”.

22.8

The

rupt-on-change functionality on both D+ and D- data

pins. This feature allows the device to detect voltage

level changes when first connected to a USB host/hub.

The USB host/hub has 15K pull-down resistors on the D+

and D- pins. When the PIC18F1XK50/PIC18LF1XK50

attaches to the bus the D+ and D- pins can detect voltage

changes. External resistors are needed for each pin to

maintain a high state on the pins when detached.

TABLE 22-4:

DS41350C-page 268

INTCON

IPR2

PIR2

PIE2

UCON

UCFG

USTAT

UADDR

UFRML

UFRMH

UIR

UIE

UEIR

UEIE

UEP0

UEP1

UEP2

UEP3

UEP4

UEP5

UEP6

UEP7

Legend:

Note 1:

Name

PIC18F1XK50/PIC18LF1XK50

Oscillator

Interrupt-On-Change for D+/D-

pins

— = unimplemented, read as ‘0’. Shaded cells are not used by the USB module.

This table includes only those hardware mapped SFRs located in Bank 15 of the data memory space. The Buffer

Descriptor registers, which are mapped into Bank 4 and are not true SFRs, are listed separately in Table 22-3.

GIE/GIEH

OSCFIP

OSCFIF

OSCFIE

UTEYE

BTSEE

BTSEF

FRM7

Bit 7

—

REGISTERS ASSOCIATED WITH USB MODULE OPERATION

PEIE/GIEL

PPBRST

ENDP3

ADDR6

SOFIE

SOFIF

FRM6

C1IP

C1IE

Bit 6

C1IF

—

STALLIF

STALLIE

TMR0IE

ENDP2

ADDR5

FRM5

C2IP

C2IE

Bit 5

C2IF

SE0

—

has

EPHSHK

PKTDIS

inter-

UPUEN

ENDP1

ADDR4

BTOEF

BTOEE

INT0IE

IDLEIF

IDLEIE

FRM4

EEIP

EEIF

EEIE

Bit 4

Preliminary

—

EPCONDIS EPOUTEN

DFN8EF

DFN8EE

BCL1IP

BCL1IE

USBEN

BCL1IF

ENDP0

ADDR3

RABIE

TRNIE

TRNIF

FRM3

Bit 3

The USB module must be disable (USBEN = 0) for the

interrupt-on-change to function. Enabling the USB

module (USBEN = 1) will automatically disable the

interrupt-on-change for D+ and D- pins. Refer to

Section 7.11

rupt-on-Change” for mode detail.

22.9

Microchip provides a number of application-specific

resources, such as USB firmware and driver support.

Refer to www.microchip.com for the latest firmware and

driver support.

—

CRC16EE

CRC16EF

RESUME

USB Firmware and Drivers

TMR0IF

ACTVIF

ACTVIE

ADDR2

FRM10

USBIP

USBIF

USBIE

FSEN

FRM2

Bit 2

DIR

“PORTA

SUSPND

CRC5EF

CRC5EE

TMR3IP

TMR3IE

UERRIF

UERRIE

EPINEN

TMR3IF

ADDR1

INT0IF

FRM1

FRM9

PPB1

PPBI

Bit 1

(1)

and

EPSTALL

URSTIF

URSTIE

ADDR0

PIDEE

RABIF

PIDEF

FRM0

FRM8

PPB0

Bit 0

—

PORTB

Details on

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Inter-

PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 270

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