PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 133

• Manufacturer Part Number: PIC18F13K50-E/P
• Manufacturer: MICROCHIP [Microchip Technology]

14.4.7.1
The STRSYNC bit of the PSTRCON register gives the
user two selections of when the steering event will
happen. When the STRSYNC bit is ‘0’, the steering
event will happen at the end of the instruction that
writes to the PSTRCON register. In this case, the
output signal at the P1<D:A> pins may be an
incomplete PWM waveform. This operation is useful
when the user firmware needs to immediately remove
a PWM signal from the pin.
When the STRSYNC bit is ‘1’, the effective steering
update will happen at the beginning of the next PWM
period. In this case, steering on/off the PWM output will
always produce a complete PWM waveform.
FIGURE 14-17:
FIGURE 14-18:
© 2009 Microchip Technology Inc.
P1<D:A>
P1<D:A>
STRn
PWM
STRn
PWM
Steering Synchronization
PORT Data
EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRSYNC = 0)
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION
(STRSYNC = 1)
PWM Period
PORT Data
PIC18F1XK50/PIC18LF1XK50
Preliminary
P1n = PWM
Figures 14-17 and 14-18 illustrate the timing diagrams
of the PWM steering depending on the STRSYNC
setting.
P1n = PWM
PORT Data
PORT Data
DS41350C-page 131