SPC8106 S-MOS Systems, SPC8106 Datasheet - Page 71

• Manufacturer Part Number: SPC8106
• Description: LCD/CRT VGA CONTROLLER
• Manufacturer: S-MOS Systems

7.1
SPC8106
Symbol
ISA bus outputs
t10a
t10b
8106 outputs
t1a
t1b
t2a
t2b
t5a
t5b
t7a
t7b
t9a
t9b
411-1.0
t3
t4
t6
t8
MEMR#, MEMW#,
A[19:0], MEMEN,
CPU Bus Cycle Timing - 8-bit Memory and I/O
A[19:0], MEMEN valid before MEMR#, MEMW# asserted
A[19:0], IOEN# valid before IOR#, IOW# asserted
A[19:0], MEMEN hold from MEMR#, MEMW# negated
A[19:0], IOEN# hold from IOR#, IOW negated
MEMW# asserted to D[7:0] valid
D[7:0] setup to IOW# negated
D[7:0] hold from MEMW# negated
D[7:0] hold from IOW# negated
MEMR#, MEMW# asserted to READY negated
MEMR# asserted to D[7:0] valid, 8 bit read
IOR# asserted to D[7:0] valid
READY asserted to D[7:0] valid (read)
D[7:0] hold from MEMR# negated
D[7:0] hold from IOR# negated
MEMR# negated to D[7:0] hi-Z delay
IOR# negated to D[7:0] hi-Z delay
IOR#, IOW#
READY
IOEN#
(write)
D[7:0]
D[7:0]
(read)
S-MOS Systems, Inc. • Tel: [phone] • Fax: [phone] • http://www.smos.com
Figure 4 : CPU Bus Cycle Timing - 8-bit
Hi-Z
Table 0-20 CPU Bus Cycle Timing - 8-bit Memory
Parameter
t1
t6
X12-SP-001-07
t3
Memorysource: 8106_cpu_bus8_01.can
t7
Min
20
10
0
0
0
0
0
8
8
t4
t8
write
Hardware Functional Specification
Typ
read
t9
t2
102Ts+47
t5
Max
3Ts
30
98
30
29
26
t10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SP1-29