SPC8106 S-MOS Systems, SPC8106 Datasheet - Page 146

• Manufacturer Part Number: SPC8106
• Description: LCD/CRT VGA CONTROLLER
• Manufacturer: S-MOS Systems

bits 3-2
bits 6-4
bits 2-0
Hardware Functional Specification
Input Status Register 0
3C2h R
CRTC
Vertical
Interrupt
Status
Page Select Register
3CDh R/W
n/a
Input Status Register 1
3DAh R
n/a
SP1-104
Accessible only when AUX[06] bit 3 = 1.
S-MOS Systems, Inc. • Tel: [phone] • Fax: [phone] • http://www.smos.com
n/a
Read Page
Bit 2
n/a
Clock Select Bits [1:0]
These bits are used to select which clock input (CLKI1 or CLKI2) is used as the active pixel clock.
For normal operation, the CLKI1 input should be connected to a 25.175 MHz crystal or oscillator,
and the CLKI2 input should be connected to a 28.322 MHz crystal or oscillator.
Note that for LCD only operation (AUX[0B] bits 1:0 = 01), the active pixel clock is forced to 28.322
MHz (CLKI2) and the setting of the above bits is ignored. For any other setting of AUX[0B] bits 1:0,
the Clock Select bits determine the active pixel clock. Even though it is not selected, the internal
oscillator for the inactive clock is continues to run. For power save modes, both internal oscillators
may be disabled by setting AUX[03] bit 4 = 1.
Read Page bits [2:0]
In 640 x 480 256 Color mode or Packed 4-bpp mode these bits select 1 of 8 pages of DRAM mem-
ory during CPU memory reads. In planer modes Read Page bit 2 selects the upper or lower 256
kbyte page of DRAM memory during CPU memory reads. These bits have no effect when the
Sprite Write Mode Enable bit or the CPU Upper 256k Access bit is set to 1.
Write Page Bits [2:0]
In 640 x 480 256 Color mode or Packed 4-bpp mode these bits select 1 of 8 pages of DRAM mem-
ory during CPU memory writes. In planer modes Write Page bit 2 selects the upper or lower 256
kbyte page of DRAM memory during CPU memory reads. These bits have no effect when the
Sprite Write Mode Enable bit or the CPU Upper 256k Access bit is set to 1.
Clock Select
Bit 1
n/a
Read Page
Bit 1
n/a
0
0
1
1
Table 0-56 Clock Select Bits
Clock Select
Bit 0
n/a
Read Page
Bit 0
n/a
0
1
0
1
X12-SP-001-07
Clock input selected
n/a
n/a
Vertical
Retrace
Status
CLKI1 (25.175 MHz)
CLKI2 (28.322 MHz)
CLKI1 (25.175 MHz)
CLKI2 (28.322 MHz)
n/a
Write Page
Bit 2
Light Pen
RO status
Read 1
n/a
Write Page
Bit 1
Light Pen
RO status
Read 0
n/a
Write Page
Bit 0
Display
Enable
Status
411-1.0
SPC8106