SPC8106 S-MOS Systems, SPC8106 Datasheet - Page 217

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SPC8106

Manufacturer Part Number
SPC8106
Description
LCD/CRT VGA CONTROLLER
Manufacturer
S-MOS Systems
Datasheet

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Appendix C BIOS USE OF INTERNAL SCRATCH BITS
The BIOS uses scratch bits to store information, which has no equivalent in a standard IBM com-
patible BIOS.
typically processed at a mode set.
This is an index into a table of possible VESA modes. If all four bits are zero, no VESA mode is
currently active. The remaining seven combinations are indexes into a table of supported VESA
modes. This table has the following values: 00 = no VESA mode, 01 = first VESA mode as
returned by function 0, 02 = second VESA mode as returned by function 0, 03 = third VESA
mode, etc. as returned by function 0.
Auxiliary register C contains the states of MD lines 0-3, 9-12. The BIOS interprets the states in
the following manner:
SPC8106
These scratch registers should not be programmed directly, using SOLLEX calls is recom-
mended instead, as bit locations may change without notice.
Auxiliary Register 4
Auxiliary Register A
Auxiliary Register B
VESA Mode Index
Auxiliary Register C (Configuration Readback Register)
411-1.0
S-MOS Systems, Inc. • Tel: (408) 922-0200 • Fax: (408) 922-0238 • http://www.smos.com
Changing a bit state has no immediate effect on the video state, scratch bits are
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
MD0: bit 0 of panel table
MD1: bit 1 of panel table
MD2: bit 2 of panel table
MD3: bit 3 of panel table
MD9: bit 4 of panel table
MD10: 32/4 ms DRAM
MD11: Power Save Mode 4 Clock Source bit 0
MD12: Power Save Mode 4 Clock Source bit 1
Allow Simultaneous Display without Error Che
Reserved
Reserved
Allow Simultaneous Display
Reserved
VESA Mode Index
X12-SP-002-03.1
BIOS Functional Specification
SP2-47

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