SPC8106 S-MOS Systems, SPC8106 Datasheet - Page 214
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SPC8106
Manufacturer Part Number
SPC8106
Description
LCD/CRT VGA CONTROLLER
Manufacturer
S-MOS Systems
Datasheet
1.SPC8106.pdf
(432 pages)
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Appendix B POWER SAVE MODE DESCRIPTIONS
The SPC8106 BIOS has built in function calls to set the 4 Software Power Modes (see Sollex
function summary). The BIOS programs the bits in Auxiliary register 03h to set the base mode,
then programs some options. Some options are selected at power up, some at run-time. This sec-
tion is a description of the resulting power states as set by the BIOS.
B.1 Software Power Save Mode 1
B.2 Software Power Save Mode 2
Mode 2 has two states. Initially the chip enters State 1. If no display memory read or write is
detected for about two horizontal lines, the chip enters State 2. If a display memory read or write
is requested while in State 2, the chip returns to State 1 to service the display memory access.
BIOS Functional Specification
SP2-44
•
•
•
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•
State 1
•
•
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•
•
No video display accesses to display memory.
Sequencer is dedicated to CPU accesses to/from display memory.
Display memory refresh is maintained and is generated from active CLKI input (28 MHz for LCD, 25 MHz or
28 MHz for CRT). Refresh rate can be selected: 64 kHz or 8 kHz, (for 256 cycle/4 ms, or 256 cycle/32 ms
DRAM, respectively).
I/O read/write of all registers is allowed.
/LCDPWR signal forced high, IREFCNT is forced high.
LCD interface output signals are low by default, but can be changed by 8106CFG.EXE.
The External RAMDAC will be forced by software to a sleep state whether in LCD, CRT or Simultaneous
Display mode.
No video display accesses to display memory.
Sequencer is dedicated to CPU accesses to/from display memory.
Display memory refresh is maintained and is generated from active CLKI input (28 MHz for LCD, 25 MHz or
28 MHz for CRT). Refresh rate can be selected: 64 kHz or 8 kHz, (for 256 cycle/4 ms, or 256 cycle/32 ms
DRAM, respectively).
I/O read/write of all registers is allowed.
/LCDPWR signal forced high, IREFCNT is forced high.
LCD interface output signals are low by default, but can be changed by 8106CFG.EXE.
The External RAMDAC will be forced by software to a sleep state whether in LCD, CRT or Simultaneous
Display mode.
S-MOS Systems, Inc. • Tel: (408) 922-0200 • Fax: (408) 922-0238 • http://www.smos.com
X12-SP-002-03.1
411-1.0
SPC8106
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