MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 342

MC68376BAMFT20

Manufacturer Part Number
MC68376BAMFT20
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68376BAMFT20

Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Interface Type
QSPI/SCI
Program Memory Type
ROM
Program Memory Size
8KB
Total Internal Ram Size
7.5KB
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
160
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BAMFT20
Manufacturer:
FREESCAL
Quantity:
245
MRMCR — Masked ROM Module Configuration Register
D.4 Masked ROM Module
D.4.1 Masked ROM Module Configuration Register
STOP — Low-Power Stop Mode Enable
D-24
DATA14
MOTOROLA
STOP
15
RESET:
The MRM is used only in the MC68376. Table D-21 shows the MRM address map.
MRM control registers are accessible in supervisor mode only.
The reset states shown for the MRM registers are for the generic (blank ROM) ver-
sions of the device. Several MRM register bit fields can be user-specified on a custom-
masked ROM device. Contact a Motorola sales representative for information on or-
dering a custom ROM device.
The reset state of the STOP bit is the complement of DATA14 state during reset. The
ROM array base address cannot be changed unless the STOP bit is set.
0 = ROM array operates normally.
1 = ROM array operates in low-power stop mode.
14
0
0
$YFF82A
$YFF82C
$YFF82E
$YFF83A
$YFF83C
$YFF83E
13
$YFF820
$YFF822
$YFF824
$YFF826
$YFF828
$YFF830
$YFF832
$YFF834
$YFF836
$YFF838
Address
Unless DATA14 is pulled down during reset, the MRM will be en-
abled. On generic MC68376 devices (blank ROM), the MRM is en-
abled at address $FF0000 (which is outside of the 1 Mbyte address
range of CSBOOT. On these devices, the MRM should be disabled
(since it is blank) by setting the STOP bit during system initialization.
0
0
BOOT
12
1
LOCK
15
11
0
Table D-21 MRM Address Map
EMUL
10
Masked ROM Module Configuration Register (MRMCR)
0
ROM Array Base Address High Register (ROMBAH)
ROM Array Base Address Low Register (ROMBAL)
REGISTER SUMMARY
9
1
ASPC[1:0]
ROM Bootstrap Word 0 (ROMBS0)
ROM Bootstrap Word 1 (ROMBS1)
ROM Bootstrap Word 2 (ROMBS2)
ROM Bootstrap Word 3 (ROMBS3)
Signature High Register (SIGHI)
Signature Low Register (SIGLO)
8
1
NOTE
Not Implemented
Not Implemented
Not Implemented
Not Implemented
Not Implemented
Not Implemented
Not Implemented
7
1
WAIT[1:0]
6
1
5
0
0
4
0
0
3
0
0
USER’S MANUAL
2
0
0
MC68336/376
0
$YFF820
1
0
0
0
0
0

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