MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 199

MC68376BAMFT20

Manufacturer Part Number
MC68376BAMFT20
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68376BAMFT20

Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Interface Type
QSPI/SCI
Program Memory Type
ROM
Program Memory Size
8KB
Total Internal Ram Size
7.5KB
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
160
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BAMFT20
Manufacturer:
FREESCAL
Quantity:
245
MC68336/376
USER’S MANUAL
occur for queue 1 and queue 2
Queue 1 active/trigger event
Queue 2 active/trigger event
Simultaneous trigger events
Figure 8-7 shows the CCW format and an example of using pause to create sub-
queues. Queue 1 is shown with four CCWs in each subqueue and queue 2 has two
CCWs in each subqueue.
Subqueues paused
occurs for queue 2
occurs for queue 1
Queue State
Inactive
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE
Table 8-3 Queue 1 Priority Assertion
A trigger event for queue 1 or queue 2 causes the corresponding queue execution
to begin.
Queue 2 cannot begin execution until queue 1 reaches completion or the paused
state. The status register records the trigger event by reporting the queue 2 status
as trigger pending. Additional trigger events for queue 2, which occur before exe-
cution can begin, are recorded as trigger overruns.
The current queue 2 conversion is aborted. The status register reports the queue
2 status as suspended. Any trigger events occurring for queue 2 while queue 2 is
suspended are recorded as trigger overruns. Once queue 1 reaches the comple-
tion or the paused state, queue 2 begins executing again. The programming of the
resume bit in QACR2 determines which CCW is executed in queue 2.
Queue 1 begins execution and the queue 2 status is changed to trigger pending.
The pause feature can be used to divide queue 1 and/or queue 2 into multiple sub-
queues. A subqueue is defined by setting the pause bit in the last CCW of the sub-
queue.
Result
MOTOROLA
8-17

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