MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 34

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

2.5 Conventions
2-8
MOTOROLA
Logic level one is the voltage that corresponds to a Boolean true (1) state.
Logic level zero is the voltage that corresponds to a Boolean false (0) state.
Set refers specifically to establishing logic level one on a bit or bits.
Clear refers specifically to establishing logic level zero on a bit or bits.
Asserted means that a signal is in active logic state. An active low signal changes
from logic level one to logic level zero when asserted. An active high signal changes
from logic level zero to logic level one.
Negated means that an asserted signal changes logic state. An active low signal
changes from logic level zero to logic level one when negated. An active high signal
changes from logic level one to logic level zero.
A specific mnemonic within a range is referred to by mnemonic and number. A15 is
bit 15 of accumulator A; ADDR7 is line 7 of the address bus; CSOR0 is chip-select op-
tion register 0. A range of mnemonics is referred to by mnemonic and the numbers
that define the range. VBR[4:0] are bits four to zero of the vector base register;
CSOR[0:5] are the first six option registers.
Parentheses are used to indicate the content of a register or memory location rather
than the register or memory location itself. (A) is the content of accumulator A. (M M
LSB means least significant bit. MSB means most significant bit. References to low
and high bytes are spelled out.
LSW means least significant word. MSW means most significant word.
ADDR is the address bus. ADDR[7:0] are the eight LSBs of the address bus.
DATA is the data bus. DATA[15:8] are the eight MSBs of the data bus.
1) is the content of the word at address M.
NOMENCLATURE
USER’S MANUAL
MC68336/376