M69030 Asiliant Technologies, M69030 Datasheet - Page 56

• Manufacturer Part Number: M69030
• Manufacturer: Asiliant Technologies

Specifications of M69030

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

5-2
Address Maps for Going Beyond VGA
This graphics controller improves upon VGA by providing additional features that are used through
numerous additional registers. Many of these additional registers are simply added to the sub-indexing
schemes already defined in the VGA standard, while others are added through sub-indexing schemes using
additional I/O address locations 3D0-3D3 and 3D6-3D7. This graphics controller also provides for the
memory-mapping of both the standard VGA and these additional registers alongside I/O-mapping. All of
the registers that are accessible via I/O addresses 3B0 through 3DF are also accessible at offsets 400760
through 4007BF from the starting address of the upper memory space. Still more of these additional
registers are 32 bits wide and for performance reasons are accessible exclusively at other offsets from the
starting address of the upper memory space.
This graphics controller also supports 1 or more megabytes of frame buffer memory -- far larger than VGA’s
standard complement of 256KB. As an improvement upon the VGA standard frame buffer port-hole, this
graphics controller also maps the entire frame buffer into part of a single contiguous memory space at a
programmable location, providing what is called “linear” access to the frame buffer. The size of this memory
space is 16MB (however, the frame buffer does not fill this entire memory space), and the base address is
set through a PCI configuration register.
Most aspects of the host interface of this graphics controller are configured through a set of built-in PCI-
compliant setup registers. The system logic accesses these registers through standard PCI configuration
read and write cycles. Therefore, the exact location of the PCI configuration registers for this graphics
controller, as well as any other PCI device in the system I/O or memory address space depends on the
system logic design and the system software that configures the system.
Lower Memory Map
Table 5-1:
I/O and Sub-Addressed Register Map
Table 5-2:
`efmp
Address
3BB-3BF
3B0-3B3
3B6-3B9
3BA
3B4
3B5
3C0
I/O

C0000 up to CFFFF
69030 Databook
Address Range
A0000-AFFFF
B8000-BFFFF
B0000-B7FFF
Lower Memory Map
I/O and Sub-Addressed Register Map
400768 & C00768
400769 & C00769
400774 & C00774
400780 & C00780
Memory Offset
Function
VGA Frame Buffer
MDA Emulation Character Buffer
CGA Emulation Frame Buffer
VGA BIOS ROM
I/O and Memory Address Maps
Input Status Register 1 (ST01)
Attribute Controller Index
(MDA Emulation)
Read
CRTC Data Port (MDA Emulation)
CRTC Index (MDA Emulation)
Attribute Controller Index and Data
Feature Control Register (FCR)
64KB
32KB
32KB
up to 64KB
Size in Bytes
(MDA Emulation)
Revision 1.3 11/24/99
Write
Port