M69030 Asiliant Technologies, M69030 Datasheet - Page 277

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M69030

Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet

Specifications of M69030

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed

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FR48
read/write at I/O address 3D1h with index at I/O address 3D0h set to 48h
shadowed only for pipeline A
Note: When the FP Display engine is enabled (when FR01 bit 1 is set to 1), it uses this register.
7-5
4
3
2
1
0
`efmp
A
B
Reserved (R/W) (reset state: 0)
Enable Text Mode Vertical Stretching (ETVS)
Text Mode Vertical Stretching Priority
Enable Vertical Line Replication (EVLR)
Enable Vertical Centering
Enable Vertical Compensation (EVCP)
69030 Databook
7
Vertical Compensation Register
Reserved (R/W)
0: Disable vertical stretching (default)
1: Enable vertical stretching
0: Priority: ETVS, EVLR (default)
1: Priority: EVLR, ETVS
This bit is effective in text modes if bits 2 and 4 are set.
0: Disables vertical line replication (default)
1: Enables vertical line replication
This bit is effective in both text and graphics modes.
0: Disables vertical centering (default)
1: Enables vertical centering
This bit is effective only when bit 0 is "1".
0: Disables vertical compensation feature (default)
1: Enables vertical compensation feature
(000)
6
5
not shadowed for this pipeline
Flat Panel Registers
ETVS
(0)
4
Text Mode
Stretch
(0)
3
EVLR
(0)
2
Centering
Vertical
Revision 1.3 11/24/99
(0)
1
EVCP
(0)
0
15-39

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