W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 65

• Manufacturer Part Number: W83627DHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.7.2
The SMI#/OVT# pin is a multi-function pin. It can be in SMI# mode or in OVT# mode by setting
Configuration Register CR[29h], bit 6 to one or zero, respectively. In OVT# mode, it can monitor
temperatures, and it is enabled or disabled for SYSTIN, CPUTIN, and AUXTIN by Bank0 Index 18h, bit
6; Bank0 Index 4Ch, bit 3; and Bank0 Index 4Ch, bit4.
The OVT# pin has two interrupt modes, comparator and interrupt. The modes are illustrated in this
figure.
If Bank0 Index 18h, bit 4, Bank1 Index 52h, bit 1, and Bank2 Index 52h, bit1 are set to zero, the OVT#
pin is in comparator mode. In comparator mode, the OVT# pin can create an interrupt once the current
temperature exceeds T
OVT# pin is asserted once the temperature has exceeded T
If Bank0 Index 18h, bit 4, Bank1 Index 52h, bit1, and Bank2 Index 52h, bit 1 are set to one, the OVT#
pin is in interrupt mode. In interrupt mode, the OVT# pin can create an interrupt once the current
temperature rises above T
above T
if the temperature remains above T
reset by reading all the interrupt status registers. The OVT# pin is asserted when an interrupt is
generated and remains asserted until the interrupt is reset.
(2) Two-Times Interrupt Mode
This mode is enabled by setting Bank0 Index 4Ch, bit 6, to zero.
In this mode, the SMI# pin can create an interrupt when the current temperature rises above T
when the current temperature falls below T
and generates an interrupt, this mode does not generate additional interrupts, even if the
temperature remains above T
reset by reading all the interrupt status registers, or subsequent events do not generate interrupts.
This is illustrated in the figure above.
OVT# Interrupt Mode
O
, however, and generates an interrupt, this mode does not generate additional interrupts, even
(Comparator Mode; default)
(Interrupt Mode)
O
and continues to create interrupts until the temperature falls below T
O
T
HYST
OVT#
OVT#
or when the temperature falls below T
To
*Interrupt Reset when Temperature sensor registers are read
O
O
, until the temperature falls below T
, until the temperature falls below T
HYST
*
-53-
. Once the temperature rises above T
O
and has not yet fallen below T
*
Publication Release Date: Aug, 22, 2007
HYST
. Once the temperature rises
HYST
HYST
. This interrupt must be
. This interrupt must be
W83627DHG
*
O
HYST
, however,
Version 1.4
HYST
.
. The
O
or