W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 164

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W83627DHG

Manufacturer Part Number
W83627DHG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83627DHG

Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
12.3.2 Data and ecpAFifo Port
Modes 000 (SPP) and 001 (PS/2) (Data Port)
During a write operation, the Data Register latches the contents of the data bus on the rising edge of
the input, and the contents of this register are output to PD0-PD7. During a read operation, ports
PD0-PD7 are read and output to the host. The bit definitions are as follows:
Mode 011 (ECP FIFO-Address/RLE)
A data byte written to this address is placed in the FIFO and tagged as an ECP Address/RLE. The
hardware at the ECP port transmits this byte to the peripheral automatically. This operation is defined
only for the forward direction. The bit definitions are as follows:
12.3.3 Device Status Register (DSR)
These bits are logical 0 during a read of the Printer Status Register. The bits of this status register are
defined as follows:
7
6
7
7
5
6
6
4
5
5
4
3
4
2
3
3
-152-
1
2
1
2
0
1
1
1
0
0
1
Address/RLE
nFault
Select
PError
nAck
nBusy
Publication Release Date: Aug, 22, 2007
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
Address or
RLE
W83627DHG
Version 1.4

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