W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 217

• Manufacturer Part Number: W83627DHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CR E4h. (Default 00h)
CR E5h. (GPIOs Reset Source Register; Default 00))
7~ 5
6~5
1~0
BIT
BIT
4
3
2
7
4
3
2
Reserved.
Reserved.
READ / WRITE
READ / WRITE
R / W
R / W
R / W
R / W
R / W
R / W
R / W
R / W
Disable / Enable to issue a 4s long PSOUT# low pulse when the system
returns from power loss state and is supposed to be “off” as described in
CRE4[6:5],
(VBAT)
0: Disable.
1: Enable.
Power-loss control bits => (VBAT)
00: System always turns off when it returns from power-loss state.
01: System always turns on when it returns from power-loss state.
10: System turns off / on when it returns from power-loss state depending
11: User defines the state before power loss.(i.e. the last state set of
VSBGATE# Enable bit =>
0: Disable.
1: Enable.
* This bit is available both for UBE and UBF version
Keyboard wake-up options. (LRESET#)
0: Password or sequence hot keys programmed in the registers.
1: Any key.
Enable the hunting mode for all wake-up events set in CRE0. This bit is
cleared when any wake-up events is captured. (LRESET#)
0: Disable.
1: Enable.
VID_MRST
0: VID reset by LRESET#.
1: VID reset by PWROK.
GP23_MRST
0: GP23 reset by LRESET#.
1: GP23 reset by PWROK.
GP22_MRST
0: GP22 reset by LRESET#.
1: GP22 reset by PWROK.
on the state before the power loss.
CRE6[4])
-205-
Logical
DESCRIPTION
DESCRIPTION
Publication Release Date: Aug, 22, 2007
Device
W83627DHG
Version 1.4
A.