W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 176

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W83627DHG

Manufacturer Part Number
W83627DHG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83627DHG

Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
14. POWER MANAGEMENT EVENT
The PME# (pin 86) signal is connected to the South Bridge and is used to wake up the system from S1
~ S5 sleeping states.
One control bit and four registers in the W83627DHG are associated with the PME function. The
control bit is at Logical Device A, CR[F2h], bit[0] and is for enabling or disabling the PME function. If this
bit is set to “0”, the W83627DHG won’t output any PME signal when any of the wake-up events has
occurred and is enabled. The four registers are divided into PME status registers and PME interrupt
registers of wake-up events
1) The PME status registers of wake-up event:
2) The PME interrupt registers of wake-up event:
Note.1
14.1 Power Control Logic
This chapter describes how the W83627DHG implements its ACPI function via these power control
pins: PSIN# (Pin 68), PSOUT# (Pin 67), SUSB# (i.e. SLP_S3#; Pin 73) and PSON# (Pin 72). The
following figure illustrates the relationships.
48 / 24 MHz
48 / 24 MHz
IOCLK
IOCLK
PME wake-up events that the W83627DHG supports include:
-
-
-
-
-
PSIN#
PSIN#
At Logical Device A, CR[F3h] and CR[F4h]
Each wake-up event has its own status
The PME status should be cleared by writing a “1” before enabling its corresponding bit in the
PME interrupt registers
At Logical Device A, CR[F6h] and CR[F7h]
Each wake-up event can be enabled / disabled individually to generate a PME# signal
Mouse IRQ event
Keyboard IRQ event
Printer IRQ event
Floppy IRQ event
UART A IRQ event
UART B IRQ event
Hardware Monitor IRQ event
WDTO# event
RIB (UARTB Ring Indicator) event
3VCC
3VCC
W83627DHG
W83627DHG
3VSB/VBAT
3VSB/VBAT
SUSB#
SUSB#
Note.1
.
PSON#
PSON#
PSOUT#
PSOUT#
Figure 14.1
-164-
PWRBTN#
PWRBTN#
South Bridge
South Bridge
SLP_S3#
SLP_S3#
Publication Release Date: Aug, 22, 2007
Power
Power
Supply
Supply
W83627DHG
PSON#
PSON#
VCC ON
VCC ON
VCC ON
Version 1.4

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