W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 196

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W83627DHG

Manufacturer Part Number
W83627DHG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83627DHG

Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
CR 2Ah. (SPI Configuration; Default 00h) (VSB Power)
* Normal Read: Read 1-byte data.
CR 2Bh. (Reserved)
7~6
5~4
BIT
Fast Read: Read 4-byte data.
3
2
1
0
READ / WRITE
R/W
R / W
R / W
R / W
R / W
R / W
Serial Peripheral Interface Configuration bit. (VSB) – These two bits are
for UBE and UBF version only
= 00
= 01
= 10
= 11
Note: These two bits are ignored when CR24, bit 1 is “0” (SPI function
is disabled).
Serial Peripheral Interface configuration bit.(VBAT)
= 00
= 01
= 10
= 11
If set to “11”, CR[2Ah], bits[7:6] must be 0.
Note: These two bits are ignored when CR24, bit 1 is “0”. (SPI function is
disabled)
SDA_filter_EN:
0: Enable SDA input to a filter
1: Disable SDA input to a filter
SCL_filter_EN:
0: Enable SCL input to a filter
1: Disable SCL input to a filter
Pin 89, Pin 90 function select (I
= 0 {Pin 89, Pin 90}
= 1 {Pin 89, Pin 90}
KB, MS pin function select
= 0 KB, MS function.
= 1 GPIO function.(GP24, GP25, GP26 and GP27)
Normal read. The clock rate is based on the setting of CR[2Ah],
bits[7:6]
Reserved
Reserved
Fast read with one dummy byte. The clock rate is 33MHz.
Normal read. SPI clock is 16MHz.
Normal read. SPI clock is 33MHz.
Normal read. SPI clock is 22MHz.
Reserved.
-184-
set by CR2C bits[6:5].
SDA, SCL.
DESCRIPTION
2
C interface)
Publication Release Date: Aug, 22, 2007
W83627DHG
Version 1.4

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