W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 24

• Manufacturer Part Number: W83627DHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.4
PENROM
SYMBOL
PENKBC
HEFRAS
DCDA#
SOUTA
DTRA#
RTSA#
DSRA#
GP60
GP61
GP62
GP63
GP64
GP65
GP66
SINA
RIA#
Serial Port & Infrared Port Interface
PIN
57
56
54
53
52
51
50
I/O
I/OD
I/OD
I/OD
I/OD
I/O
I/O
I/O
INt
IN
O
IN
IN
O
IN
O
IN
8
IN
8
8
8
t
t
t
t
t
t
8
8
12t
12t
12t
12t
Ring Indicator. An active-low signal indicates that a ring signal is
being received from the modem or the data set.
General-purpose I/O port 6 bit 0.
Data Carrier Detection. An active-low signal indicates the modem
or data set has detected a data carrier.
General-purpose I/O port 6 bit 1.
UART A Serial Output. This pin is used to transmit serial data out
to the communication link.
During power on reset, this pin is pulled down internally and is
defined as PENKBC, and the power-on values are shown at
CR24 bit 2. The PCB layout should reserve space for a 1-kΩ
resistor to pull down this pin to ensure the disabling of KBC, and a
1-kΩ resistor is recommended to pull the pin up If wish to enable
KBC.
General-purpose I/O port 6 bit 2.
Serial Input. This pin is used to receive serial data through the
communication link.
General-purpose I/O port 6 bit 3.
UART A Data Terminal Ready. An active-low signal informs the
modem or data set that the controller is ready to communicate.
During power-on reset, this pin is pulled down internally and is
defined as PENROM disabled, and the power-on values are
shown at CR24 bit 1 (ENROM). The PCB layout should reserve
space for a 1-kΩ resistor to pull down this pin to ensure the
disabling of SPI interface, and a 1-kΩ resistor is recommended to
pull the pin up if wish to enable ROM.
General-purpose I/O port 6 bit 4.
UART A Request To Send. An active-low signal informs the
modem or data set that the controller is ready to send data.
During power-on reset, this pin is pulled down internally and is
defined as HEFRAS, which provides the power-on value for CR26
bit 6 (HEFRAS). The PCB layout should reserve space for a 1-kΩ
resistor to pull down this pin so as to ensure the selection of I/O
port’s configuration address to 2EH, and a 1-kΩ resistor is
recommended to pull it up if 4EH is selected as I/O port′s
General-purpose I/O port 6 bit 5.
Data Set Ready. An active-low signal indicates the modem or
data set is ready to establish a communication link and transfer
data to the UART.
General-purpose I/O port 6 bit 6.
configuration address.
-12-
DESCRIPTION
Publication Release Date: Aug, 22, 2007
W83627DHG
Version 1.4