W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 181

• Manufacturer Part Number: W83627DHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.4 PWROK Generation
The PWROK (Pin 71) signal is an output and is used as the 3VCC power-on reset signal.
When the W83627DHG detects the 3VCC voltage rises to “V3”, it then starts a delay – “t2” before the
rising edge of PWROK asserting. If the 3VCC voltage falls below “V4”, the PWROK de-asserts
immediately.
Timing and voltage parameters are shown in Figure 14.6 and Table 14.3.
Originally, the t2 timing is between 300 mS to 500 mS, but it can be changed to 200 mS to 300 mS by
programming Logical Device A, CR[E6h], bit 3 to “1”. Furthermore, the W83627DHG provides four
different extra delay time of PWROK for various demands. The four extra delay time are designed at
SYMBOL
SYMBOL
PWROK
V1
V2
V1
V2
V3
V4
V3
V4
t1
t2
3VCC
3VSB Valid Voltage
3VSB Ineffective Voltage
3VSB Valid Voltage
3VSB Ineffective Voltage
Valid 3VSB to RSMRST# inactive
3VCC Valid Voltage
3VCC Ineffective Voltage
3VCC Valid Voltage
3VCC Ineffective Voltage
Valid 3VCC to PWROK active
V3
PARAMETER
PARAMETER
t2
MIN.
2.25
300
2.4
2.4
Table 14.2
-
Table 14.3
Figure 14.6
MIN.
2.25
100
2.4
2.4
-
-169-
TYP.
2.6
2.4
-
-
-
TYP.
2.6
2.4
-
-
-
MAX.
2.75
2.55
500
3.1
-
MAX.
2.75
2.55
200
3.1
Publication Release Date: Aug, 22, 2007
-
UNIT
mS
V
V
V
V
UNIT
mS
V
V
V
V
For both UBC and UBE
For both UBC and UBE
V4
W83627DHG
For UBF version
For UBF version
For both UBC and
For both UBC and
For UBF version
For UBF version
version
version
UBE version
UBE version
NOTE
NOTE
Version 1.4