W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 4

• Manufacturer Part Number: W83627DHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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09/29/2006
10/05/2006
12/12/2006
DATES
VERSION
0.6
1.0
1.1
VERSION
WEB
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5.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Remove control bit of enable/disable PME# of MIDI at
11. Modify the descriptions of Tape Drive Register in
12. Correct the description of Digital Input Register, bit
13. Remove the description of “MR pin” in Digital Output
14. Adapt “Serial Flash Interface” to “Serial Peripheral
15. Modify “Absolute Maximum Ratings” in Chapter 21
16. Remove “V
17. Update “
18.
1.
1.
2.
3.
-II-
clock selection.
Modify the default values of HM Device Bank 0,
CR[43h] bit 5,0 and CR[46h] bit 2~1.
Add new chapters for Serial Peripheral Interface,
Configuration
Management, Serialized IRQ, Watchdog Timer VID
Inputs and Outputs, and PCI Reset Buffers.
Update the feature lists of the W83627DHG in Chapter
2 Features.
Add descriptions of PECI and SST and a table of
SMBus in Chapter 5 Pin Description.
Add new sections of Caseopen and Beep Alarm
Function in Chapter 7 Hardware Monitor.
Add Clock Input Timing, PECI & SST Timing, and SPI
Timing in Chapter 21 Specifications.
Remove
EXT2FDD).
Modify the descriptions of Hardware Monitor Device,
Bank 0, Index 59h, bits(6..4).
Add a beep control bit for VIN4 at Hardware Monitor
Device, Bank 0, Index 57h, bit6.
Remove status bit of PME# status of MIDI IRQ event at
Logical Device A, CRF4, bit 1.
Logical Device A, CRF7, bit 1.
Chapter 10 Floppy Disk Controller.
(6-4) in Chapter 10 Floppy Disk Controller.
Register in Chapter 10 Floppy Disk Controller.
Interface”.
Specifications.
description of DC Characteristics in Chapter 21
Specifications.
Remove the section of “AT Interface” in Chapter
10 Floppy Disk Controller.
Update AC Timing parameters and waveforms.
Update Table 9.1 and Table 9.2 in Chapter 9 Serial
Update CR2Ah in Chapter 20 Configuration Register
Modify CR24h bit 0 to reserved
Peripheral Interface
S5
sections
c o l d
DD
Publication Release Date: Aug, 22, 2007
Register
MAIN CONTENTS
state” to “S5 state.
is 5V± 10% tolerance” from the
9.4
Access
and
W83627DHG
9.5
Protocol,
(EXTFDD
Version 1.4
Power
and