W83627DHG Nuvoton Technology Corporation of America, W83627DHG Datasheet - Page 193

• Manufacturer Part Number: W83627DHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CR 24h. (Global Option; Default 0100_0ss0b)
Note1:
Disable Serial Peripheral Interface
Pin 2
Pin 19
Pin 58
Pin 118 BEEP
BIT
7
6
5
4
3
2
1
0
Reserved.
READ / WRITE
GP23
GP22
AUXFANIN1
Read Only
R / W
R / W
R / W
R / W
R / W
R / W
Select output type of CPUFANOUT1
=0
=1
CLKSEL => Input clock rate selection
= 0 The clock input on pin 18 is 24 MHz.
= 1 The clock input on pin 18 is 48 MHz. (Default)
Select output type of AUXFANOUT
=0
=1
Select output type of SYSFANOUT
=0
=1
Select output type of CPUFANOUT0
=0
=1
ENKBC => Enable keyboard controller
= 0 KBC is disabled after hardware reset.
= 1 KBC is enabled after hardware reset.
This bit is read-only, and it is set or reset by a power-on strapping pin (Pin
54, SOUTA).
ENROM => Enable Serial Peripheral Interface
= 0 ROM is disabled after hardware reset.
= 1 ROM is enabled after hardware reset.
This bit is set or reset by a power-on strapping pin (Pin 52, DTRA#).
Note 1
CPUFANOUT1 is Push-pull. (Default)
CPUFANOUT1 is Open-drain.
AUXFANOUT is Push-pull. (Default)
AUXFANOUT is Open-drain.
SYSFANOUT is Open-drain. (Default)
SYSFANOUT is Push-pull.
CPUFANOUT0 is Open-drain. (Default)
CPUFANOUT0 is Push-pull.
-181-
Enable Serial Peripheral Interface
Pin 2
Pin 19
Pin 58
Pin 118 SO
DESCRIPTION
SCK
SCE
SI
Publication Release Date: Aug, 22, 2007
s: value by strapping
W83627DHG
Version 1.4