DS33R41+ Maxim Integrated Products, DS33R41+ Datasheet - Page 94

IC TXRX ETHERNET MAP 400-BGA

DS33R41+

Manufacturer Part Number
DS33R41+
Description
IC TXRX ETHERNET MAP 400-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R41+

Number Of Drivers/receivers
4/4
Protocol
T1/E1/J1
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
10.17.3 HDLC Mapping
The HDLC controllers must be assigned a space in the T1/E1 bandwidth in which they transmit and receive data.
The controllers can be mapped to either the FDL (T1), Sa bits (E1), or to channels. If mapped to channels, then
any channel or combination of channels, contiguous or not, can be assigned to an HDLC controller. When
assigned to a channel(s), any combination of bits within the channel(s) can be avoided.
The TR.HxRCS1–TR.HxRCS4 registers are used to assign the receive controllers to channels 1–24 (T1) or
1–32 (E1) according to the following table:
The TR.HxTCS1 – TR.HxTCS4 registers are used to assign the transmit controllers to channels 1–24 (T1) or
1–32 (E1) according to the following table.
TR.HxTCS1
TR.HxTCS2
TR.HxTCS3
TR.HxTCS4
REGISTER
TR.HxRCS1
TR.HxRCS2
TR.HxRCS3
TR.HxRCS4
REGISTER
CHANNELS
CHANNELS
17–24
25–32
9–16
1–8
17–24
25–32
9–16
1–8
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