DS33R41+ Maxim Integrated Products, DS33R41+ Datasheet - Page 301

IC TXRX ETHERNET MAP 400-BGA

DS33R41+

Manufacturer Part Number
DS33R41+
Description
IC TXRX ETHERNET MAP 400-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R41+

Number Of Drivers/receivers
4/4
Protocol
T1/E1/J1
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 13-16. Receive Side Boundary Timing, RSYSCLK = 2.048MHz
(With Elastic Store Enabled)
NOTES:
1) RSYNC is in the output mode (TR.IOCR1.4 = 0).
2) RSYNC is in the input mode (TR.IOCR1.4 = 1).
3) RCHBLK is programmed to block channel 1.
4) RSIG normally contains the CAS multiframe-alignment nibble (0000) in channel 1.
NOTES:
1) 8.192MHz bus configuration.
2) Data on unused channels is ignored.
Figure 13-17. Receive IBO Channel Interleave Mode Timing
RSYNC
RCLKI
RSERO
RSYSCLK
RCHBLK
RSYNC
RMSYNC
RCHCLK
RSERO
RSYNC
RSYNC
RSERO
RSIG
LINK 4, CHANNEL 32
2
1
3
L3 C32
L4 C32
CHANNEL 31
A
CHANNEL 31
LSB
L1 C1
B
MSB
C
BIT LEVEL DETAIL
L2 C1
LSB MSB
D
LINK #1, CHANNEL #1
LINK 1, CHANNEL 1
301 of 335
L3 C1
CHANNEL 32
L4 C1
A
CHANNEL 32
LSB
B
L1 C2
MSB
C
LSB MSB
D
L2 C2
LINK 2, CHANNEL 1
L3 C2
CHANNEL 1
CHANNEL 1
L4 C2
Note 4
LSB

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