DS33R41+ Maxim Integrated Products, DS33R41+ Datasheet - Page 67

IC TXRX ETHERNET MAP 400-BGA

DS33R41+

Manufacturer Part Number
DS33R41+
Description
IC TXRX ETHERNET MAP 400-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R41+

Number Of Drivers/receivers
4/4
Protocol
T1/E1/J1
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9.17 Committed Information Rate Controller
The device provides a CIR provisioning facility. The CIR can be used to restrict the transport of received MAC data
to the serial port at a programmable rate. This is shown in the Main Block Diagram in
restrict the data flow from the Receive MAC to Transmit HDLC. This can be used for provisioning and billing
functions towards the WAN. The user must set the CIR register to control the amount of data throughput from the
MAC to the HDLC/X.86 transmitter. The CIR register is in granularity of 500kbps with a range of 0 to 52Mbps. The
operation of the CIR is as follows:
The CIR block counts the credits that are accumulated at the end of every 125ms.
If data is received and stored in the SDRAM to be sent to the Serial Interface, the interface will request the
data if there is a positive credit balance. If the credit balance is negative, transmit interface does not
request data.
New credit balance is calculated: credit balance = old credit balance – frame size in bytes after the frame is
sent.
The credit balance is incremented every 125ms by CIR/8.
Credit balances not used in 250ms are reset to 0.
The maximum value of CIR can not exceed the transmit line rate.
If the data rate received from the Ethernet interface is higher than the CIR, the receive queue buffers will fill
and the high threshold water mark will invoke flow control to reduce the incoming traffic rate.
CIR function is only available in data received at the Ethernet Interface to be sent to WAN. There is not
CIR functionality for data arriving from the WAN to be sent to the Ethernet Interface.
Negative credits are not allowed, if there is not a credit balance, no frames are sent until there is a credit
balance again.
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Figure
6-1. The CIR will

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