DS33R41+ Maxim Integrated Products, DS33R41+ Datasheet - Page 172

IC TXRX ETHERNET MAP 400-BGA

DS33R41+

Manufacturer Part Number
DS33R41+
Description
IC TXRX ETHERNET MAP 400-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R41+

Number Of Drivers/receivers
4/4
Protocol
T1/E1/J1
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Frame Length (FL[7:0]). These eight bits are the low byte of the length (in bytes) of the received
frame, with FCS and Padding. If Automatic Pad Stripping is enabled, this value is the length of the received packet
without PCS or Pad bytes. The upper six bits are contained in SU.RFSB1.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Runt Frame (RF). This bit is set to 1 if the received frame was altered by a collision or terminated within the
collision window.
Bit 6: Watchdog Timeout (WT). This bit is set to 1 if a packet receive time exceeds 2048 byte times. After 2048
byte times the receiver is disabled and the received frame will fail CRC check.
Bits 5 to 0: Frame Length (FL[13:8]). These six bits are the upper bits of the length (in bytes) of the received
frame, with FCS and Padding. If Automatic Pad Stripping is enabled, this value is the length of the received packet
without PCS or Pad bytes.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 5: CRC Error (CRCE). This bit is set to 1 if the received frame does not contain a valid CRC value.
Bit 4: Dribbling Bit (DB). This bit is set to 1 if the received frame contains a non-integer multiple of 8 bits. It does
not indicate that the frame is invalid. This bit is not valid for runt or collided frames.
Bit 3: MII Error (MIIE). This bit is set to 1 if an error was found on the MII bus.
Bit 2: Frame Type (FT). This bit is set to 1 if the received frame exceeds 1536 bytes. It is equal to zero if the
received frame is an 802.3 frame. This bit is not valid for runt frames.
Bit 1: Collision Seen (CS). This bit is set to 1 if a late collision occurred on the received packet. A late collision is
one that occurs after the 64-byte collision window.
Bit 0: Frame Too Long (FTL). This bit is set to 1 if a frame exceeds the 1518 byte maximum standard Ethernet
frame. This bit is only an indication, and causes no frame truncation.
FL7
RF
7
0
7
0
7
0
FL6
WT
6
0
6
0
6
0
SU.RFSB0
Receive Frame Status Byte 0
154h
SU.RFSB1
Receive Frame Status Byte 1
155h
SU.RFSB2
Receive Frame Status Byte 2
156h
CRCE
FL13
FL5
5
0
5
0
5
0
172 of 335
FL12
FL4
DB
0
0
0
4
4
4
FL11
MIIE
FL3
3
0
3
0
3
0
FL10
FL2
FT
2
0
2
0
2
0
FL1
FL9
CS
1
0
1
0
1
0
FTL
FL0
FL8
0
0
0
0
0
0

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