CY7C68014A-56BAXC Cypress Semiconductor Corp, CY7C68014A-56BAXC Datasheet - Page 49

• Manufacturer Part Number: CY7C68014A-56BAXC
• Description: IC MCU USB PERIPH HI SPD 56VFBGA
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX2LP™r

Specifications of CY7C68014A-56BAXC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C680xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 24
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-VFBGA
• Core Size: 16bit
• No. Of I/o's: 24
• Program Memory Size: 16KB
• Ram Memory Size: 16KB
• Cpu Speed: 48MHz
• Oscillator Type: External Only
• No. Of Timers: 3
• Digital Ic Case Style: VFBGA
• Supply Voltage Range: 3V
• Controller Family/series: EZ-USB FX2LP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4611B - KIT USB TO ATA REFERENCE DESIGN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Document #: 38-08032 Rev. *K
10.15
Table 10-17. Slave FIFO Synchronous Address Parameters
10.16
Slave FIFO Asynchronous Address Parameters
t
t
t
t
t
IFCLK
SFA
FAH
SFA
FAH
Parameter
Parameter
Slave FIFO Synchronous Address
Slave FIFO Asynchronous Address
Interface Clock Period
FIFOADR[1:0] to Clock Set-up Time
Clock to FIFOADR[1:0] Hold Time
FIFOADR[1:0] to SLRD/SLWR/PKTEND Set-up Time
RD/WR/PKTEND to FIFOADR[1:0] Hold Time
SLRD/SLWR/PKTEND
SLCS/FIFOADR [1:0]
SLCS/FIFOADR [1:0]
Figure 10-17. Slave FIFO Asynchronous Address Timing Diagram
Figure 10-16. Slave FIFO Synchronous Address Timing Diagram
IFCLK
Description
Description
[23]
t
SFA
[21]
t
SFA
t
FAH
CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
t
FAH
20.83
Min.
Min.
25
10
10
10
[20]
[20]
Max.
Max.
200
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Unit
Unit
ns
ns
ns
ns
ns