CY7C68014A-56BAXC Cypress Semiconductor Corp, CY7C68014A-56BAXC Datasheet - Page 31

• Manufacturer Part Number: CY7C68014A-56BAXC
• Description: IC MCU USB PERIPH HI SPD 56VFBGA
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX2LP™r

Specifications of CY7C68014A-56BAXC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C680xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 24
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-VFBGA
• Core Size: 16bit
• No. Of I/o's: 24
• Program Memory Size: 16KB
• Ram Memory Size: 16KB
• Cpu Speed: 48MHz
• Oscillator Type: External Only
• No. Of Timers: 3
• Digital Ic Case Style: VFBGA
• Supply Voltage Range: 3V
• Controller Family/series: EZ-USB FX2LP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4611B - KIT USB TO ATA REFERENCE DESIGN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Document #: 38-08032 Rev. *K
Table 5-1. FX2LP Register Summary (continued)
Hex
E662 1
E663 1
E664 1
E665 1
E666 1
E667 1
E668 1
E669 7
E670 1
E671 1
E672 1
E673 4
E677 1
E678 1
E679 1
E67A 1
E67B 1
E67C 1
E67D 1
E67E 1
E67F 1
E680 1
E681 1
E682 1
E683 1
E684 1
E685 1
E686 1
E687 1
E688 2
E68A 1
E68B 1
E68C 1
E68D 1
E68E 1
E68F 1
E690 1
E691 1
E692 2
E694 1
E695 1
E696 2
E698 1
E699 1
E69A 2
E69C 1
E69D 1
E69E 2
E6A0 1
E6A1 1
E6A2 1
E6A3 1
Size Name
USBERRIE
USBERRIRQ
ERRCNTLIM
CLRERRCNT
INT2IVEC
INT4IVEC
INTSET-UP
reserved
INPUT / OUTPUT
PORTACFG
PORTCCFG
PORTECFG
reserved
reserved
I2CS
I2DAT
I2CTL
XAUTODAT1
XAUTODAT2
UDMA CRC
UDMACRCH
UDMACRCL
UDMACRC-
QUALIFIER
USB CONTROL
USBCS
SUSPEND
WAKEUPCS
TOGCTL
USBFRAMEH
USBFRAMEL
MICROFRAME
FNADDR
reserved
ENDPOINTS
EP0BCH
EP0BCL
reserved
EP1OUTBC
reserved
EP1INBC
EP2BCH
EP2BCL
reserved
EP4BCH
EP4BCL
reserved
EP6BCH
EP6BCL
reserved
EP8BCH
EP8BCL
reserved
EP0CS
EP1OUTCS
EP1INCS
EP2CS
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[12]
Description
USB Error Interrupt
Enables
USB Error Interrupt
Requests
USB Error counter and
limit
Clear Error Counter EC3:0 x
Interrupt 2 (USB)
Autovector
Interrupt 4 (slave FIFO &
GPIF) Autovector
Interrupt 2&4 set-up
I/O PORTA Alternate
Configuration
I/O PORTC Alternate
Configuration
I/O PORTE Alternate
Configuration
I²C Bus
Control & Status
I²C Bus
Data
I²C Bus
Control
Autoptr1 MOVX access,
when APTREN=1
Autoptr2 MOVX access,
when APTREN=1
UDMA CRC MSB
UDMA CRC LSB
UDMA CRC Qualifier
USB Control & Status
Put chip into suspend
Wakeup Control & Status WU2
Toggle Control
USB Frame count H
USB Frame count L
Microframe count, 0-7
USB Function address
Endpoint 0 Byte Count H (BC15)
Endpoint 0 Byte Count L (BC7)
Endpoint 1 OUT Byte
Count
Endpoint 1 IN Byte Count 0
Endpoint 2 Byte Count H 0
Endpoint 2 Byte Count L BC7/SKIP
Endpoint 4 Byte Count H 0
Endpoint 4 Byte Count L BC7/SKIP
Endpoint 6 Byte Count H 0
Endpoint 6 Byte Count L BC7/SKIP
Endpoint 8 Byte Count H 0
Endpoint 8 Byte Count L BC7/SKIP
Endpoint 0 Control and
Status
Endpoint 1 OUT Control
and Status
Endpoint 1 IN Control and
Status
Endpoint 2 Control and
Status
b7
ISOEP8
ISOEP8
EC3
0
1
0
FLAGD
GPIFA7
GPIFA8
START
d7
0
D7
D7
CRC15
CRC7
QENABLE
HSM
x
Q
0
FC7
0
0
0
HSNAK
0
0
0
b6
ISOEP6
ISOEP6
EC2
x
I2V4
0
0
SLCS
GPIFA6
T2EX
STOP
d6
0
D6
D6
CRC14
CRC6
0
0
x
WU
S
0
FC6
0
FA6
(BC14)
BC6
BC6
BC6
0
BC6
0
BC6
0
BC6
0
BC6
0
0
0
NPAK2
b5
ISOEP4
ISOEP4
EC1
x
I2V3
I4V3
0
0
GPIFA5
INT6
LASTRD
d5
0
D5
D5
CRC13
CRC5
0
0
x
WU2POL
R
0
FC5
0
FA5
(BC13)
BC5
BC5
BC5
0
BC5
0
BC5
0
BC5
0
BC5
0
0
0
NPAK1
b4
ISOEP2
ISOEP2
EC0
x
I2V2
I4V2
0
0
GPIFA4
RXD1OUT
ID1
d4
0
D4
D4
CRC12
CRC4
0
0
x
WUPOL
IO
0
FC4
0
FA4
(BC12)
BC4
BC4
BC4
0
BC4
0
BC4
0
BC4
0
BC4
0
0
0
NPAK0
b3
0
0
LIMIT3
x
I2V1
I4V1
AV2EN
0
GPIFA3
RXD0OUT T2OUT
ID0
d3
0
D3
D3
CRC11
CRC3
QSTATE
DISCON
x
0
EP3
0
FC3
0
FA3
(BC11)
BC3
BC3
BC3
0
BC3
0
BC3
0
BC3
0
BC3
0
0
0
FULL
CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
b2
0
0
LIMIT2
x
I2V0
I4V0
0
0
GPIFA2
BERR
d2
0
D2
D2
CRC10
CRC2
QSIGNAL2 QSIGNAL1 QSIGNAL0
NOSYNSOF RENUM
x
DPEN
EP2
FC10
FC2
MF2
FA2
(BC10)
BC2
BC2
BC2
BC10
BC2
0
BC2
BC10
BC2
0
BC2
0
0
0
EMPTY
b1
0
0
LIMIT1
x
0
0
INT4SRC
INT1
GPIFA1
T1OUT
ACK
d1
STOPIE
D1
D1
CRC9
CRC1
x
WU2EN
EP1
FC9
FC1
MF1
FA1
(BC9)
BC1
BC1
BC1
BC9
BC1
BC9
BC1
BC9
BC1
BC9
BC1
BUSY
BUSY
BUSY
0
b0
ERRLIMIT
ERRLIMIT
LIMIT0
x
0
0
AV4EN
INT0
GPIFA0
T0OUT
DONE
d0
400KHZ
D0
D0
CRC8
CRC0
SIGRSUME x0000000 rrrrbbbb
x
WUEN
EP0
FC8
FC0
MF0
FA0
(BC8)
BC0
BC0
BC0
BC8
BC0
BC8
BC0
BC8
BC0
BC8
BC0
STALL
STALL
STALL
STALL
Page 31 of 60
Default
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